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3e5e00b654
Often GPIO ranges are added in batch, so create a special function for that. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
152 lines
5.2 KiB
C
152 lines
5.2 KiB
C
/*
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* Interface the pinctrl subsystem
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*
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* Copyright (C) 2011 ST-Ericsson SA
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* Written on behalf of Linaro for ST-Ericsson
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* This interface is used in the core to keep track of pins.
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*
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* Author: Linus Walleij <linus.walleij@linaro.org>
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*
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef __LINUX_PINCTRL_PINCTRL_H
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#define __LINUX_PINCTRL_PINCTRL_H
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#ifdef CONFIG_PINCTRL
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#include <linux/radix-tree.h>
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#include <linux/list.h>
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#include <linux/seq_file.h>
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#include "pinctrl-state.h"
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struct device;
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struct pinctrl_dev;
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struct pinctrl_map;
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struct pinmux_ops;
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struct pinconf_ops;
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struct gpio_chip;
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struct device_node;
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/**
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* struct pinctrl_pin_desc - boards/machines provide information on their
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* pins, pads or other muxable units in this struct
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* @number: unique pin number from the global pin number space
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* @name: a name for this pin
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*/
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struct pinctrl_pin_desc {
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unsigned number;
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const char *name;
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};
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/* Convenience macro to define a single named or anonymous pin descriptor */
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#define PINCTRL_PIN(a, b) { .number = a, .name = b }
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#define PINCTRL_PIN_ANON(a) { .number = a }
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/**
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* struct pinctrl_gpio_range - each pin controller can provide subranges of
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* the GPIO number space to be handled by the controller
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* @node: list node for internal use
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* @name: a name for the chip in this range
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* @id: an ID number for the chip in this range
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* @base: base offset of the GPIO range
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* @pin_base: base pin number of the GPIO range
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* @npins: number of pins in the GPIO range, including the base number
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* @gc: an optional pointer to a gpio_chip
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*/
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struct pinctrl_gpio_range {
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struct list_head node;
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const char *name;
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unsigned int id;
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unsigned int base;
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unsigned int pin_base;
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unsigned int npins;
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struct gpio_chip *gc;
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};
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/**
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* struct pinctrl_ops - global pin control operations, to be implemented by
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* pin controller drivers.
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* @get_groups_count: Returns the count of total number of groups registered.
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* @get_group_name: return the group name of the pin group
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* @get_group_pins: return an array of pins corresponding to a certain
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* group selector @pins, and the size of the array in @num_pins
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* @pin_dbg_show: optional debugfs display hook that will provide per-device
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* info for a certain pin in debugfs
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* @dt_node_to_map: parse a device tree "pin configuration node", and create
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* mapping table entries for it. These are returned through the @map and
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* @num_maps output parameters. This function is optional, and may be
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* omitted for pinctrl drivers that do not support device tree.
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* @dt_free_map: free mapping table entries created via @dt_node_to_map. The
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* top-level @map pointer must be freed, along with any dynamically
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* allocated members of the mapping table entries themselves. This
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* function is optional, and may be omitted for pinctrl drivers that do
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* not support device tree.
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*/
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struct pinctrl_ops {
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int (*get_groups_count) (struct pinctrl_dev *pctldev);
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const char *(*get_group_name) (struct pinctrl_dev *pctldev,
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unsigned selector);
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int (*get_group_pins) (struct pinctrl_dev *pctldev,
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unsigned selector,
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const unsigned **pins,
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unsigned *num_pins);
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void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned offset);
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int (*dt_node_to_map) (struct pinctrl_dev *pctldev,
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struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps);
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void (*dt_free_map) (struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps);
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};
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/**
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* struct pinctrl_desc - pin controller descriptor, register this to pin
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* control subsystem
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* @name: name for the pin controller
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* @pins: an array of pin descriptors describing all the pins handled by
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* this pin controller
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* @npins: number of descriptors in the array, usually just ARRAY_SIZE()
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* of the pins field above
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* @pctlops: pin control operation vtable, to support global concepts like
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* grouping of pins, this is optional.
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* @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
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* @confops: pin config operations vtable, if you support pin configuration in
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* your driver
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* @owner: module providing the pin controller, used for refcounting
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*/
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struct pinctrl_desc {
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const char *name;
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struct pinctrl_pin_desc const *pins;
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unsigned int npins;
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struct pinctrl_ops *pctlops;
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struct pinmux_ops *pmxops;
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struct pinconf_ops *confops;
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struct module *owner;
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};
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/* External interface to pin controller */
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extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
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struct device *dev, void *driver_data);
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extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
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extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
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extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range);
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extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *ranges,
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unsigned nranges);
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extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
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extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
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#else
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struct pinctrl_dev;
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/* Sufficiently stupid default functions when pinctrl is not in use */
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static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
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{
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return pin >= 0;
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}
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#endif /* !CONFIG_PINCTRL */
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#endif /* __LINUX_PINCTRL_PINCTRL_H */
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