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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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63bef54738
Introduce accessors for the SSP registers so that drivers don't need to open code offsets from the MMIO base. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
108 lines
2.4 KiB
C
108 lines
2.4 KiB
C
/*
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* ssp.h
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*
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* Copyright (C) 2003 Russell King, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This driver supports the following PXA CPU/SSP ports:-
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*
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* PXA250 SSP
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* PXA255 SSP, NSSP
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* PXA26x SSP, NSSP, ASSP
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* PXA27x SSP1, SSP2, SSP3
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* PXA3xx SSP1, SSP2, SSP3, SSP4
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*/
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#ifndef __ASM_ARCH_SSP_H
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#define __ASM_ARCH_SSP_H
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#include <linux/list.h>
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#include <linux/io.h>
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enum pxa_ssp_type {
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SSP_UNDEFINED = 0,
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PXA25x_SSP, /* pxa 210, 250, 255, 26x */
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PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
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PXA27x_SSP,
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};
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struct ssp_device {
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struct platform_device *pdev;
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struct list_head node;
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struct clk *clk;
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void __iomem *mmio_base;
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unsigned long phys_base;
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const char *label;
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int port_id;
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int type;
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int use_count;
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int irq;
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int drcmr_rx;
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int drcmr_tx;
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};
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/*
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* SSP initialisation flags
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*/
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#define SSP_NO_IRQ 0x1 /* don't register an irq handler in SSP driver */
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struct ssp_state {
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u32 cr0;
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u32 cr1;
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u32 to;
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u32 psp;
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};
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struct ssp_dev {
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struct ssp_device *ssp;
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u32 port;
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u32 mode;
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u32 flags;
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u32 psp_flags;
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u32 speed;
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int irq;
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};
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int ssp_write_word(struct ssp_dev *dev, u32 data);
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int ssp_read_word(struct ssp_dev *dev, u32 *data);
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int ssp_flush(struct ssp_dev *dev);
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void ssp_enable(struct ssp_dev *dev);
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void ssp_disable(struct ssp_dev *dev);
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void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
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void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
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int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
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int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
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void ssp_exit(struct ssp_dev *dev);
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/**
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* ssp_write_reg - Write to a SSP register
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*
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* @dev: SSP device to access
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* @reg: Register to write to
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* @val: Value to be written.
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*/
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static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
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{
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__raw_writel(val, dev->mmio_base + reg);
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}
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/**
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* ssp_read_reg - Read from a SSP register
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*
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* @dev: SSP device to access
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* @reg: Register to read from
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*/
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static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
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{
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return __raw_readl(dev->mmio_base + reg);
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}
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struct ssp_device *ssp_request(int port, const char *label);
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void ssp_free(struct ssp_device *);
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#endif /* __ASM_ARCH_SSP_H */
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