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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c3a07134e6
This patch converts the Marvell MV643XX ethernet driver to use the Marvell Orion MDIO driver. As a result, PowerPC and ARM platforms registering the Marvell MV643XX ethernet driver are also updated to register a Marvell Orion MDIO driver. This driver voluntarily overlaps with the Marvell Ethernet shared registers because it will use a subset of this shared register (shared_base + 0x4 to shared_base + 0x84). The Ethernet driver is also updated to look up for a PHY device using the Orion MDIO bus driver. For ARM and PowerPC we register a single instance of the "mvmdio" driver in the system like it used to be done with the use of the "shared_smi" platform_data cookie on ARM. Note that it is safe to register the mvmdio driver only for the "ge00" instance of the driver because this "ge00" interface is guaranteed to always be explicitely registered by consumers of arch/arm/plat-orion/common.c and other instances (ge01, ge10 and ge11) were all pointing their shared_smi to ge00. For PowerPC the in-tree Device Tree Source files mention only one MV643XX ethernet MAC instance so the MDIO bus driver is registered only when id == 0. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David S. Miller <davem@davemloft.net>
84 lines
1.8 KiB
C
84 lines
1.8 KiB
C
/*
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* MV-643XX ethernet platform device data definition file.
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*/
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#ifndef __LINUX_MV643XX_ETH_H
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#define __LINUX_MV643XX_ETH_H
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#include <linux/mbus.h>
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#define MV643XX_ETH_SHARED_NAME "mv643xx_eth"
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#define MV643XX_ETH_NAME "mv643xx_eth_port"
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#define MV643XX_ETH_SHARED_REGS 0x2000
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#define MV643XX_ETH_SHARED_REGS_SIZE 0x2000
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#define MV643XX_ETH_BAR_4 0x2220
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#define MV643XX_ETH_SIZE_REG_4 0x2224
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#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290
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#define MV643XX_TX_CSUM_DEFAULT_LIMIT 0
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struct mv643xx_eth_shared_platform_data {
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struct mbus_dram_target_info *dram;
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/*
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* Max packet size for Tx IP/Layer 4 checksum, when set to 0, default
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* limit of 9KiB will be used.
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*/
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int tx_csum_limit;
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};
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#define MV643XX_ETH_PHY_ADDR_DEFAULT 0
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#define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x))
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#define MV643XX_ETH_PHY_NONE 0xff
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struct mv643xx_eth_platform_data {
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/*
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* Pointer back to our parent instance, and our port number.
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*/
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struct platform_device *shared;
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int port_number;
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/*
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* Whether a PHY is present, and if yes, at which address.
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*/
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int phy_addr;
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/*
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* Use this MAC address if it is valid, overriding the
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* address that is already in the hardware.
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*/
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u8 mac_addr[6];
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/*
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* If speed is 0, autonegotiation is enabled.
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* Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000.
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* Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL.
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*/
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int speed;
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int duplex;
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/*
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* How many RX/TX queues to use.
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*/
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int rx_queue_count;
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int tx_queue_count;
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/*
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* Override default RX/TX queue sizes if nonzero.
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*/
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int rx_queue_size;
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int tx_queue_size;
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/*
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* Use on-chip SRAM for RX/TX descriptors if size is nonzero
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* and sufficient to contain all descriptors for the requested
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* ring sizes.
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*/
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unsigned long rx_sram_addr;
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int rx_sram_size;
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unsigned long tx_sram_addr;
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int tx_sram_size;
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};
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#endif
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