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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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570c70a60f
Introduce the "lrclk-strength" property to allow LRCLK pad drive strength to be changed via device tree. When running a stress playback loop test on a mx6dl wandboard channel swap can be noticed on about 10% of the times. While debugging this issue I noticed that when probing the SGTL5000 LRCLK pin with the scope the swap did not happen. After removing the probe the swap started to happen again. After changing the LRCLK pad drive strength to the maximum value the issue is gone. Same fix works on a mx6dl Colibri board as well. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Mark Brown <broonie@kernel.org>
49 lines
1.2 KiB
Plaintext
49 lines
1.2 KiB
Plaintext
* Freescale SGTL5000 Stereo Codec
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Required properties:
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- compatible : "fsl,sgtl5000".
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- reg : the I2C address of the device
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- clocks : the clock provider of SYS_MCLK
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- VDDA-supply : the regulator provider of VDDA
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- VDDIO-supply: the regulator provider of VDDIO
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Optional properties:
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- VDDD-supply : the regulator provider of VDDD
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- micbias-resistor-k-ohms : the bias resistor to be used in kOmhs
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The resistor can take values of 2k, 4k or 8k.
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If set to 0 it will be off.
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If this node is not mentioned or if the value is unknown, then
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micbias resistor is set to 4K.
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- micbias-voltage-m-volts : the bias voltage to be used in mVolts
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The voltage can take values from 1.25V to 3V by 250mV steps
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If this node is not mentioned or the value is unknown, then
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the value is set to 1.25V.
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- lrclk-strength: the LRCLK pad strength. Possible values are:
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0, 1, 2 and 3 as per the table below:
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VDDIO 1.8V 2.5V 3.3V
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0 = Disable
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1 = 1.66 mA 2.87 mA 4.02 mA
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2 = 3.33 mA 5.74 mA 8.03 mA
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3 = 4.99 mA 8.61 mA 12.05 mA
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Example:
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks 150>;
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micbias-resistor-k-ohms = <2>;
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micbias-voltage-m-volts = <2250>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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};
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