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The Hisilicon Network Subsystem is a long term evolution IP which is supposed to be used in Hisilicon ICT SoC. The IP, which is called hns for short, is a TCP/IP acceleration engine, which can directly decode TCP/IP stream and distribute them to different ring buffers. HNS can be configured to work on different mode for different scenario. This patch make use only some of the mode to make it as standard ethernet NIC. The other mode will be added soon. The whole function has 4 kernel sub-modules: hnae: the HNS acceleration engine framework. It provides a abstract interface between the engine and the upper layers which make use of the engine by ring buffer. hns_enet_drv: a standard ethernet driver that base on the ring buffer. hns_dsaf: one of the implementation of HNS acceleration engine, which is applied on Hililicon hip05, Hi1610 and other later-on SoCs hns_mdio: the mdio control to the PHY, used by acceleration engine This submit add basic config and documents Signed-off-by: huangdaode <huangdaode@hisilicon.com> Signed-off-by: Kenneth Lee <liguozhu@huawei.com> Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
89 lines
2.1 KiB
Plaintext
89 lines
2.1 KiB
Plaintext
Hisilicon hip04 Ethernet Controller
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* Ethernet controller node
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Required properties:
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- compatible: should be "hisilicon,hip04-mac".
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- reg: address and length of the register set for the device.
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- interrupts: interrupt for the device.
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- port-handle: <phandle port channel>
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phandle, specifies a reference to the syscon ppe node
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port, port number connected to the controller
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channel, recv channel start from channel * number (RX_DESC_NUM)
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- phy-mode: see ethernet.txt [1].
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Optional properties:
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- phy-handle: see ethernet.txt [1].
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[1] Documentation/devicetree/bindings/net/ethernet.txt
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* Ethernet ppe node:
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Control rx & tx fifos of all ethernet controllers.
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Have 2048 recv channels shared by all ethernet controllers, only if no overlap.
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Each controller's recv channel start from channel * number (RX_DESC_NUM).
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Required properties:
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- compatible: "hisilicon,hip04-ppe", "syscon".
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- reg: address and length of the register set for the device.
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* MDIO bus node:
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Required properties:
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- compatible: should be "hisilicon,mdio".
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- Inherits from MDIO bus node binding [2]
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[2] Documentation/devicetree/bindings/net/phy.txt
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Example:
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mdio {
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compatible = "hisilicon,mdio";
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reg = <0x28f1000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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marvell,reg-init = <18 0x14 0 0x8001>;
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};
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phy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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marvell,reg-init = <18 0x14 0 0x8001>;
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};
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};
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ppe: ppe@28c0000 {
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compatible = "hisilicon,hip04-ppe", "syscon";
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reg = <0x28c0000 0x10000>;
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};
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fe: ethernet@28b0000 {
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compatible = "hisilicon,hip04-mac";
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reg = <0x28b0000 0x10000>;
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interrupts = <0 413 4>;
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phy-mode = "mii";
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port-handle = <&ppe 31 0>;
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};
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ge0: ethernet@2800000 {
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compatible = "hisilicon,hip04-mac";
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reg = <0x2800000 0x10000>;
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interrupts = <0 402 4>;
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phy-mode = "sgmii";
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port-handle = <&ppe 0 1>;
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phy-handle = <&phy0>;
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};
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ge8: ethernet@2880000 {
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compatible = "hisilicon,hip04-mac";
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reg = <0x2880000 0x10000>;
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interrupts = <0 410 4>;
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phy-mode = "sgmii";
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port-handle = <&ppe 8 2>;
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phy-handle = <&phy1>;
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};
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