mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 11:58:21 +07:00
bfe0237dd6
Add support for OSD9616P0899-10 96x16 passive matrix display. The pre-charge period parameters are taken form a OSD9616P0899-10 document, but the display works fine with the default values too. Signed-off-by: Jyri Sarha <jsarha@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
513 lines
12 KiB
Plaintext
513 lines
12 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/*
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* AM335x ICE V2 board
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* http://www.ti.com/tool/tmdsice3359
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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/ {
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model = "TI AM3359 ICE-V2";
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compatible = "ti,am3359-icev2", "ti,am33xx";
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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chosen {
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stdout-path = &uart3;
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};
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vbat: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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};
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vtt_fixed: fixedregulator1 {
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compatible = "regulator-fixed";
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regulator-name = "vtt";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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};
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leds-iio {
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status = "disabled";
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compatible = "gpio-leds";
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led-out0 {
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label = "out0";
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gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-out1 {
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label = "out1";
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gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-out2 {
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label = "out2";
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gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-out3 {
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label = "out3";
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gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-out4 {
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label = "out4";
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gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-out5 {
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label = "out5";
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gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-out6 {
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label = "out6";
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gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-out7 {
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label = "out7";
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gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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/* Tricolor status LEDs */
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leds1 {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds>;
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led0 {
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label = "status0:red:cpu0";
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gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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linux,default-trigger = "cpu0";
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};
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led1 {
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label = "status0:green:usr";
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gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led2 {
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label = "status0:yellow:usr";
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gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led3 {
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label = "status1:red:mmc0";
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gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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linux,default-trigger = "mmc0";
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};
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led4 {
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label = "status1:green:usr";
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gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led5 {
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label = "status1:yellow:usr";
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gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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gpio-decoder {
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compatible = "gpio-decoder";
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gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
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<&pca9536 2 GPIO_ACTIVE_HIGH>,
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<&pca9536 1 GPIO_ACTIVE_HIGH>,
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<&pca9536 0 GPIO_ACTIVE_HIGH>;
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linux,axis = <0>; /* ABS_X */
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decoder-max-value = <9>;
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};
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};
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&am33xx_pinmux {
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user_leds: user_leds {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT, MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT, MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT, MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT, MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */
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>;
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};
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mmc0_pins_default: mmc0_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
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>;
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};
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i2c0_pins_default: i2c0_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
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>;
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};
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spi0_pins_default: spi0_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
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>;
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};
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uart3_pins_default: uart3_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLUP, MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1, RMII mode */
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AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txen.rmii1_txen */
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/* Slave 2, RMII mode */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_wait0.rmii2_crs_dv */
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AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_col.rmii2_refclk */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_wpn.rmii2_rxerr */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* gpmc_a5.rmii2_txd0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* gpmc_a4.rmii2_txd1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* gpmc_a0.rmii2_txen */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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/* Slave 2 reset value */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_default>;
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status = "okay";
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clock-frequency = <400000>;
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tps: power-controller@2d {
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reg = <0x2d>;
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};
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tpic2810: gpio@60 {
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compatible = "ti,tpic2810";
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reg = <0x60>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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pca9536: gpio@41 {
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compatible = "ti,pca9536";
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reg = <0x41>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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/* osd9616p0899-10 */
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display@3c {
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compatible = "solomon,ssd1306fb-i2c";
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reg = <0x3c>;
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solomon,height = <16>;
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solomon,width = <96>;
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solomon,com-seq;
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solomon,com-invdir;
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solomon,page-offset = <0>;
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solomon,prechargep1 = <2>;
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solomon,prechargep2 = <13>;
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};
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};
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&spi0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins_default>;
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sn65hvs882@1 {
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compatible = "pisosr-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
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reg = <1>;
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spi-max-frequency = <1000000>;
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spi-cpol;
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};
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spi_nor: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "winbond,w25q64", "jedec,spi-nor";
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spi-max-frequency = <80000000>;
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m25p,fast-read;
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reg = <0>;
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partition@0 {
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label = "u-boot-spl";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@1 {
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label = "u-boot";
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reg = <0x80000 0x100000>;
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read-only;
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};
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partition@2 {
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label = "u-boot-env";
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reg = <0x180000 0x20000>;
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read-only;
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};
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partition@3 {
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label = "misc";
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reg = <0x1A0000 0x660000>;
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};
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};
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};
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&tscadc {
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status = "okay";
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adc {
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ti,adc-channels = <1 2 3 4 5 6 7>;
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};
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};
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#include "tps65910.dtsi"
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&tps {
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vcc1-supply = <&vbat>;
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vcc2-supply = <&vbat>;
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vcc3-supply = <&vbat>;
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vcc4-supply = <&vbat>;
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vcc5-supply = <&vbat>;
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vcc6-supply = <&vbat>;
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vcc7-supply = <&vbat>;
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vccio-supply = <&vbat>;
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regulators {
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vrtc_reg: regulator@0 {
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regulator-always-on;
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};
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vio_reg: regulator@1 {
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regulator-always-on;
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};
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vdd1_reg: regulator@2 {
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <912500>;
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regulator-max-microvolt = <1326000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd2_reg: regulator@3 {
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regulator-name = "vdd_core";
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regulator-min-microvolt = <912500>;
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regulator-max-microvolt = <1144000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd3_reg: regulator@4 {
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regulator-always-on;
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};
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vdig1_reg: regulator@5 {
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regulator-always-on;
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};
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vdig2_reg: regulator@6 {
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regulator-always-on;
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};
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vpll_reg: regulator@7 {
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regulator-always-on;
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};
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vdac_reg: regulator@8 {
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regulator-always-on;
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};
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vaux1_reg: regulator@9 {
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regulator-always-on;
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};
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vaux2_reg: regulator@10 {
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regulator-always-on;
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};
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vaux33_reg: regulator@11 {
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regulator-always-on;
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};
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vmmc_reg: regulator@12 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
vmmc-supply = <&vmmc_reg>;
|
|
bus-width = <4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc0_pins_default>;
|
|
};
|
|
|
|
&gpio0_target {
|
|
/* Do not idle the GPIO used for holding the VTT regulator */
|
|
ti,no-reset-on-init;
|
|
ti,no-idle-on-init;
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart3_pins_default>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio3 {
|
|
p4 {
|
|
gpio-hog;
|
|
gpios = <4 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "PR1_MII_CTRL";
|
|
};
|
|
|
|
p10 {
|
|
gpio-hog;
|
|
gpios = <10 GPIO_ACTIVE_HIGH>;
|
|
/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
|
|
output-high;
|
|
line-name = "MUX_MII_CTL1";
|
|
};
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy-handle = <ðphy0>;
|
|
phy-mode = "rmii";
|
|
dual_emac_res_vlan = <1>;
|
|
};
|
|
|
|
&cpsw_emac1 {
|
|
phy-handle = <ðphy1>;
|
|
phy-mode = "rmii";
|
|
dual_emac_res_vlan = <2>;
|
|
};
|
|
|
|
&mac {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_default>;
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
status = "okay";
|
|
dual_emac;
|
|
};
|
|
|
|
&davinci_mdio {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
status = "okay";
|
|
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
|
|
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
|
|
|
|
ethphy0: ethernet-phy@1 {
|
|
reg = <1>;
|
|
};
|
|
|
|
ethphy1: ethernet-phy@3 {
|
|
reg = <3>;
|
|
};
|
|
};
|