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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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89a0fd18a9
The ZF Micro OHCI controller exhibits unexpected behavior that seems to be
related to high load. Under certain conditions, the controller will
complete a TD, remove it from the endpoint's queue, and fail to add it to
the donelist. This causes the endpoint to appear to stop responding. Worse,
if the device is removed while in that state, OHCI will hang while waiting
for the orphaned TD to complete. The situation is not recoverable without
rebooting.
This fix enhances the scope of the existing OHCI_QUIRK_ZFMICRO flag:
1. A watchdog routine periodically scans the OHCI structures to check
for orphaned TDs. In these cases the TD is taken back from the
controller and completed normally.
2. If a device is removed while the endpoint is hung but before the
watchdog catches the situation, any outstanding TDs are taken back
from the controller in the 'sanitize' phase.
The ohci-hcd driver used to print "INTR_SF lossage" in this situation;
this changes it to the universally accurate "ED unlink timeout". Other
instances of this message presumably have different root causes.
Both this Compaq quirk and a NEC quirk are now properly compiled out for
non-PCI builds of this driver.
Signed-off-by: Mike Nuss <mike@terascala.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
139 lines
3.3 KiB
C
139 lines
3.3 KiB
C
/*
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* OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
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*
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* This file is licenced under the GPL.
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*/
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/*-------------------------------------------------------------------------*/
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/*
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* OHCI deals with three types of memory:
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* - data used only by the HCD ... kmalloc is fine
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* - async and periodic schedules, shared by HC and HCD ... these
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* need to use dma_pool or dma_alloc_coherent
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* - driver buffers, read/written by HC ... the hcd glue or the
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* device driver provides us with dma addresses
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*
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* There's also "register" data, which is memory mapped.
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* No memory seen by this driver (or any HCD) may be paged out.
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*/
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/*-------------------------------------------------------------------------*/
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static void ohci_hcd_init (struct ohci_hcd *ohci)
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{
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ohci->next_statechange = jiffies;
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spin_lock_init (&ohci->lock);
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INIT_LIST_HEAD (&ohci->pending);
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}
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/*-------------------------------------------------------------------------*/
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static int ohci_mem_init (struct ohci_hcd *ohci)
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{
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ohci->td_cache = dma_pool_create ("ohci_td",
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ohci_to_hcd(ohci)->self.controller,
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sizeof (struct td),
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32 /* byte alignment */,
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0 /* no page-crossing issues */);
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if (!ohci->td_cache)
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return -ENOMEM;
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ohci->ed_cache = dma_pool_create ("ohci_ed",
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ohci_to_hcd(ohci)->self.controller,
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sizeof (struct ed),
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16 /* byte alignment */,
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0 /* no page-crossing issues */);
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if (!ohci->ed_cache) {
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dma_pool_destroy (ohci->td_cache);
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return -ENOMEM;
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}
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return 0;
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}
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static void ohci_mem_cleanup (struct ohci_hcd *ohci)
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{
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if (ohci->td_cache) {
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dma_pool_destroy (ohci->td_cache);
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ohci->td_cache = NULL;
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}
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if (ohci->ed_cache) {
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dma_pool_destroy (ohci->ed_cache);
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ohci->ed_cache = NULL;
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}
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}
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/*-------------------------------------------------------------------------*/
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/* ohci "done list" processing needs this mapping */
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static inline struct td *
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dma_to_td (struct ohci_hcd *hc, dma_addr_t td_dma)
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{
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struct td *td;
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td_dma &= TD_MASK;
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td = hc->td_hash [TD_HASH_FUNC(td_dma)];
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while (td && td->td_dma != td_dma)
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td = td->td_hash;
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return td;
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}
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/* TDs ... */
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static struct td *
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td_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
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{
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dma_addr_t dma;
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struct td *td;
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td = dma_pool_alloc (hc->td_cache, mem_flags, &dma);
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if (td) {
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/* in case hc fetches it, make it look dead */
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memset (td, 0, sizeof *td);
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td->hwNextTD = cpu_to_hc32 (hc, dma);
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td->td_dma = dma;
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/* hashed in td_fill */
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}
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return td;
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}
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static void
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td_free (struct ohci_hcd *hc, struct td *td)
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{
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struct td **prev = &hc->td_hash [TD_HASH_FUNC (td->td_dma)];
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while (*prev && *prev != td)
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prev = &(*prev)->td_hash;
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if (*prev)
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*prev = td->td_hash;
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else if ((td->hwINFO & cpu_to_hc32(hc, TD_DONE)) != 0)
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ohci_dbg (hc, "no hash for td %p\n", td);
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dma_pool_free (hc->td_cache, td, td->td_dma);
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}
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/*-------------------------------------------------------------------------*/
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/* EDs ... */
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static struct ed *
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ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
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{
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dma_addr_t dma;
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struct ed *ed;
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ed = dma_pool_alloc (hc->ed_cache, mem_flags, &dma);
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if (ed) {
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memset (ed, 0, sizeof (*ed));
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INIT_LIST_HEAD (&ed->td_list);
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ed->dma = dma;
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}
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return ed;
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}
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static void
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ed_free (struct ohci_hcd *hc, struct ed *ed)
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{
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dma_pool_free (hc->ed_cache, ed, ed->dma);
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}
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