mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 00:35:19 +07:00
78084dcf29
Although this driver gives the framebuffer layer a different
size for the framebuffer it uses the entire aperture PCI BAR
size for the MTRR. Since the framebuffer is included in that
range and MTRR was used on the entire PCI BAR WC will have
been preferred on that range as well. This propagates the
WC preference on the same entire PCI BAR.
Convert the driver from using the x86 specific MTRR code to
the architecture agnostic arch_phys_wc_add(). arch_phys_wc_add()
will avoid MTRR if write-combining is available, in order to
take advantage of that also ensure the ioremap'd area is requested
as write-combining.
There are a few motivations for this:
a) Take advantage of PAT when available
b) Help bury MTRR code away, MTRR is architecture specific and on
x86 its replaced by PAT
c) Help with the goal of eventually using _PAGE_CACHE_UC over
_PAGE_CACHE_UC_MINUS on x86 on ioremap_nocache() (see commit
de33c442e
titled "x86 PAT: fix performance drop for glx,
use UC minus for ioremap(), ioremap_nocache() and
pci_mmap_page_range()")
The conversion done is expressed by the following Coccinelle
SmPL patch, it additionally required manual intervention to
address all the #ifdery and removal of redundant things which
arch_phys_wc_add() already addresses such as verbose message
about when MTRR fails and doing nothing when we didn't get
an MTRR.
@ mtrr_found @
expression index, base, size;
@@
-index = mtrr_add(base, size, MTRR_TYPE_WRCOMB, 1);
+index = arch_phys_wc_add(base, size);
@ mtrr_rm depends on mtrr_found @
expression mtrr_found.index, mtrr_found.base, mtrr_found.size;
@@
-mtrr_del(index, base, size);
+arch_phys_wc_del(index);
@ mtrr_rm_zero_arg depends on mtrr_found @
expression mtrr_found.index;
@@
-mtrr_del(index, 0, 0);
+arch_phys_wc_del(index);
@ mtrr_rm_fb_info depends on mtrr_found @
struct fb_info *info;
expression mtrr_found.index;
@@
-mtrr_del(index, info->fix.smem_start, info->fix.smem_len);
+arch_phys_wc_del(index);
@ ioremap_replace_nocache depends on mtrr_found @
struct fb_info *info;
expression base, size;
@@
-info->screen_base = ioremap_nocache(base, size);
+info->screen_base = ioremap_wc(base, size);
@ ioremap_replace_default depends on mtrr_found @
struct fb_info *info;
expression base, size;
@@
-info->screen_base = ioremap(base, size);
+info->screen_base = ioremap_wc(base, size);
Generated-by: Coccinelle SmPL
Cc: Maik Broemme <mbroemme@plusserver.de>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Suresh Siddha <sbsiddha@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Juergen Gross <jgross@suse.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Antonino Daplas <adaplas@gmail.com>
Cc: linux-fbdev@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
382 lines
7.8 KiB
C
382 lines
7.8 KiB
C
#ifndef _INTELFB_H
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#define _INTELFB_H
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/* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
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#include <linux/agp_backend.h>
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#include <linux/fb.h>
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#ifdef CONFIG_FB_INTEL_I2C
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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#endif
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/*** Version/name ***/
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#define INTELFB_VERSION "0.9.6"
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#define INTELFB_MODULE_NAME "intelfb"
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#define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM"
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/*** Debug/feature defines ***/
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#ifndef DEBUG
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#define DEBUG 0
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#endif
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#ifndef VERBOSE
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#define VERBOSE 0
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#endif
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#ifndef REGDUMP
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#define REGDUMP 0
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#endif
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#ifndef DETECT_VGA_CLASS_ONLY
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#define DETECT_VGA_CLASS_ONLY 1
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#endif
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#ifndef ALLOCATE_FOR_PANNING
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#define ALLOCATE_FOR_PANNING 1
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#endif
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#ifndef PREFERRED_MODE
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#define PREFERRED_MODE "1024x768-32@70"
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#endif
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/*** hw-related values ***/
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/* Resource Allocation */
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#define INTELFB_FB_ACQUIRED 1
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#define INTELFB_MMIO_ACQUIRED 2
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/* PCI ids for supported devices */
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#define PCI_DEVICE_ID_INTEL_830M 0x3577
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#define PCI_DEVICE_ID_INTEL_845G 0x2562
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#define PCI_DEVICE_ID_INTEL_85XGM 0x3582
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#define PCI_DEVICE_ID_INTEL_854 0x358E
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#define PCI_DEVICE_ID_INTEL_865G 0x2572
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#define PCI_DEVICE_ID_INTEL_915G 0x2582
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#define PCI_DEVICE_ID_INTEL_915GM 0x2592
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#define PCI_DEVICE_ID_INTEL_945G 0x2772
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#define PCI_DEVICE_ID_INTEL_945GM 0x27A2
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#define PCI_DEVICE_ID_INTEL_945GME 0x27AE
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#define PCI_DEVICE_ID_INTEL_965G 0x29A2
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#define PCI_DEVICE_ID_INTEL_965GM 0x2A02
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/* Size of MMIO region */
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#define INTEL_REG_SIZE 0x80000
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#define STRIDE_ALIGNMENT 16
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#define STRIDE_ALIGNMENT_I9XX 64
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#define PALETTE_8_ENTRIES 256
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/*** Macros ***/
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/* basic arithmetic */
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#define KB(x) ((x) * 1024)
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#define MB(x) ((x) * 1024 * 1024)
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#define BtoKB(x) ((x) / 1024)
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#define BtoMB(x) ((x) / 1024 / 1024)
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#define GTT_PAGE_SIZE KB(4)
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#define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
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#define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
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#define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
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#define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
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/* messages */
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#define PFX INTELFB_MODULE_NAME ": "
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#define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
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#define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
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#define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
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#define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
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#if DEBUG
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#define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
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#else
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#define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
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#endif
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/* get commonly used pointers */
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#define GET_DINFO(info) (info)->par
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/* misc macros */
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#define ACCEL(d, i) \
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((d)->accel && !(d)->ring_lockup && \
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((i)->var.accel_flags & FB_ACCELF_TEXT))
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/*#define NOACCEL_CHIPSET(d) \
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((d)->chipset != INTEL_865G)*/
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#define NOACCEL_CHIPSET(d) \
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(0)
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#define FIXED_MODE(d) ((d)->fixed_mode)
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/*** Driver parameters ***/
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#define RINGBUFFER_SIZE KB(64)
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#define HW_CURSOR_SIZE KB(4)
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/* Intel agpgart driver */
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#define AGP_PHYSICAL_MEMORY 2
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/* store information about an Ixxx DVO */
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/* The i830->i865 use multiple DVOs with multiple i2cs */
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/* the i915, i945 have a single sDVO i2c bus - which is different */
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#define MAX_OUTPUTS 6
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/* these are outputs from the chip - integrated only
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external chips are via DVO or SDVO output */
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#define INTELFB_OUTPUT_UNUSED 0
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#define INTELFB_OUTPUT_ANALOG 1
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#define INTELFB_OUTPUT_DVO 2
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#define INTELFB_OUTPUT_SDVO 3
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#define INTELFB_OUTPUT_LVDS 4
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#define INTELFB_OUTPUT_TVOUT 5
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#define INTELFB_DVO_CHIP_NONE 0
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#define INTELFB_DVO_CHIP_LVDS 1
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#define INTELFB_DVO_CHIP_TMDS 2
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#define INTELFB_DVO_CHIP_TVOUT 4
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#define INTELFB_OUTPUT_PIPE_NC 0
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#define INTELFB_OUTPUT_PIPE_A 1
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#define INTELFB_OUTPUT_PIPE_B 2
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/*** Data Types ***/
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/* supported chipsets */
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enum intel_chips {
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INTEL_830M,
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INTEL_845G,
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INTEL_85XGM,
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INTEL_852GM,
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INTEL_852GME,
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INTEL_854,
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INTEL_855GM,
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INTEL_855GME,
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INTEL_865G,
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INTEL_915G,
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INTEL_915GM,
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INTEL_945G,
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INTEL_945GM,
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INTEL_945GME,
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INTEL_965G,
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INTEL_965GM,
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};
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struct intelfb_hwstate {
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u32 vga0_divisor;
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u32 vga1_divisor;
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u32 vga_pd;
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u32 dpll_a;
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u32 dpll_b;
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u32 fpa0;
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u32 fpa1;
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u32 fpb0;
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u32 fpb1;
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u32 palette_a[PALETTE_8_ENTRIES];
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u32 palette_b[PALETTE_8_ENTRIES];
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u32 htotal_a;
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u32 hblank_a;
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u32 hsync_a;
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u32 vtotal_a;
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u32 vblank_a;
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u32 vsync_a;
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u32 src_size_a;
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u32 bclrpat_a;
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u32 htotal_b;
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u32 hblank_b;
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u32 hsync_b;
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u32 vtotal_b;
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u32 vblank_b;
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u32 vsync_b;
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u32 src_size_b;
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u32 bclrpat_b;
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u32 adpa;
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u32 dvoa;
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u32 dvob;
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u32 dvoc;
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u32 dvoa_srcdim;
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u32 dvob_srcdim;
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u32 dvoc_srcdim;
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u32 lvds;
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u32 pipe_a_conf;
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u32 pipe_b_conf;
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u32 disp_arb;
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u32 cursor_a_control;
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u32 cursor_b_control;
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u32 cursor_a_base;
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u32 cursor_b_base;
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u32 cursor_size;
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u32 disp_a_ctrl;
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u32 disp_b_ctrl;
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u32 disp_a_base;
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u32 disp_b_base;
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u32 cursor_a_palette[4];
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u32 cursor_b_palette[4];
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u32 disp_a_stride;
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u32 disp_b_stride;
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u32 vgacntrl;
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u32 add_id;
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u32 swf0x[7];
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u32 swf1x[7];
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u32 swf3x[3];
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u32 fence[8];
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u32 instpm;
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u32 mem_mode;
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u32 fw_blc_0;
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u32 fw_blc_1;
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u16 hwstam;
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u16 ier;
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u16 iir;
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u16 imr;
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};
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struct intelfb_heap_data {
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u32 physical;
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u8 __iomem *virtual;
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u32 offset; /* in GATT pages */
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u32 size; /* in bytes */
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};
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#ifdef CONFIG_FB_INTEL_I2C
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struct intelfb_i2c_chan {
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struct intelfb_info *dinfo;
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u32 reg;
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struct i2c_adapter adapter;
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struct i2c_algo_bit_data algo;
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};
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#endif
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struct intelfb_output_rec {
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int type;
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int pipe;
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int flags;
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#ifdef CONFIG_FB_INTEL_I2C
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struct intelfb_i2c_chan i2c_bus;
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struct intelfb_i2c_chan ddc_bus;
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#endif
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};
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struct intelfb_vsync {
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wait_queue_head_t wait;
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unsigned int count;
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int pan_display;
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u32 pan_offset;
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};
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struct intelfb_info {
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struct fb_info *info;
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struct fb_ops *fbops;
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struct pci_dev *pdev;
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struct intelfb_hwstate save_state;
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/* agpgart structs */
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struct agp_memory *gtt_fb_mem; /* use all stolen memory or vram */
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struct agp_memory *gtt_ring_mem; /* ring buffer */
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struct agp_memory *gtt_cursor_mem; /* hw cursor */
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/* use a gart reserved fb mem */
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u8 fbmem_gart;
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int wc_cookie;
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/* heap data */
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struct intelfb_heap_data aperture;
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struct intelfb_heap_data fb;
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struct intelfb_heap_data ring;
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struct intelfb_heap_data cursor;
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/* mmio regs */
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u32 mmio_base_phys;
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u8 __iomem *mmio_base;
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/* fb start offset (in bytes) */
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u32 fb_start;
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/* ring buffer */
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u32 ring_head;
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u32 ring_tail;
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u32 ring_tail_mask;
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u32 ring_space;
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u32 ring_lockup;
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/* palette */
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u32 pseudo_palette[16];
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/* chip info */
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int pci_chipset;
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int chipset;
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const char *name;
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int mobile;
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/* current mode */
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int bpp, depth;
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u32 visual;
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int xres, yres, pitch;
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int pixclock;
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/* current pipe */
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int pipe;
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/* some flags */
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int accel;
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int hwcursor;
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int fixed_mode;
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int ring_active;
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int flag;
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unsigned long irq_flags;
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int open;
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/* vsync */
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struct intelfb_vsync vsync;
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spinlock_t int_lock;
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/* hw cursor */
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int cursor_on;
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int cursor_blanked;
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u8 cursor_src[64];
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/* initial parameters */
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int initial_vga;
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struct fb_var_screeninfo initial_var;
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u32 initial_fb_base;
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u32 initial_video_ram;
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u32 initial_pitch;
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/* driver registered */
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int registered;
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/* index into plls */
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int pll_index;
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/* outputs */
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int num_outputs;
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struct intelfb_output_rec output[MAX_OUTPUTS];
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};
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#define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G) || \
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((dinfo)->chipset == INTEL_915GM) || \
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((dinfo)->chipset == INTEL_945G) || \
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((dinfo)->chipset == INTEL_945GM) || \
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((dinfo)->chipset == INTEL_945GME) || \
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((dinfo)->chipset == INTEL_965G) || \
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((dinfo)->chipset == INTEL_965GM))
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/*** function prototypes ***/
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extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
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#ifdef CONFIG_FB_INTEL_I2C
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extern void intelfb_create_i2c_busses(struct intelfb_info *dinfo);
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extern void intelfb_delete_i2c_busses(struct intelfb_info *dinfo);
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#endif
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#endif /* _INTELFB_H */
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