mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 06:06:53 +07:00
923a081c72
Signed-off-by: Pavel Machek <pavel@ucw.cz> [dwalker@codeaurora.org: renamed to trout, checkpatch cleanup] Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
113 lines
2.9 KiB
C
113 lines
2.9 KiB
C
/*
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* linux/arch/arm/mach-msm/gpio.c
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*
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* Copyright (C) 2005 HP Labs
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* Copyright (C) 2008 Google, Inc.
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* Copyright (C) 2009 Pavel Machek <pavel@ucw.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include "board-trout.h"
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struct msm_gpio_chip {
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struct gpio_chip chip;
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void __iomem *reg; /* Base of register bank */
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u8 shadow;
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};
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#define to_msm_gpio_chip(c) container_of(c, struct msm_gpio_chip, chip)
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static int msm_gpiolib_get(struct gpio_chip *chip, unsigned offset)
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{
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struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip);
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unsigned mask = 1 << offset;
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return !!(readb(msm_gpio->reg) & mask);
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}
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static void msm_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val)
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{
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struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip);
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unsigned mask = 1 << offset;
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if (val)
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msm_gpio->shadow |= mask;
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else
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msm_gpio->shadow &= ~mask;
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writeb(msm_gpio->shadow, msm_gpio->reg);
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}
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static int msm_gpiolib_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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msm_gpiolib_set(chip, offset, 0);
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return 0;
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}
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static int msm_gpiolib_direction_output(struct gpio_chip *chip,
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unsigned offset, int val)
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{
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msm_gpiolib_set(chip, offset, val);
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return 0;
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}
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#define TROUT_GPIO_BANK(name, reg_num, base_gpio, shadow_val) \
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{ \
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.chip = { \
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.label = name, \
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.direction_input = msm_gpiolib_direction_input,\
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.direction_output = msm_gpiolib_direction_output, \
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.get = msm_gpiolib_get, \
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.set = msm_gpiolib_set, \
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.base = base_gpio, \
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.ngpio = 8, \
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}, \
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.reg = (void *) reg_num + TROUT_CPLD_BASE, \
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.shadow = shadow_val, \
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}
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static struct msm_gpio_chip msm_gpio_banks[] = {
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#if defined(CONFIG_MSM_DEBUG_UART1)
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/* H2W pins <-> UART1 */
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TROUT_GPIO_BANK("MISC2", 0x00, TROUT_GPIO_MISC2_BASE, 0x40),
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#else
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/* H2W pins <-> UART3, Bluetooth <-> UART1 */
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TROUT_GPIO_BANK("MISC2", 0x00, TROUT_GPIO_MISC2_BASE, 0x80),
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#endif
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/* I2C pull */
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TROUT_GPIO_BANK("MISC3", 0x02, TROUT_GPIO_MISC3_BASE, 0x04),
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TROUT_GPIO_BANK("MISC4", 0x04, TROUT_GPIO_MISC4_BASE, 0),
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/* mmdi 32k en */
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TROUT_GPIO_BANK("MISC5", 0x06, TROUT_GPIO_MISC5_BASE, 0x04),
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TROUT_GPIO_BANK("INT2", 0x08, TROUT_GPIO_INT2_BASE, 0),
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TROUT_GPIO_BANK("MISC1", 0x0a, TROUT_GPIO_MISC1_BASE, 0),
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TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0),
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};
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/*
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* Called from the processor-specific init to enable GPIO pin support.
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*/
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int __init trout_init_gpio(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
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gpiochip_add(&msm_gpio_banks[i].chip);
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return 0;
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}
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postcore_initcall(trout_init_gpio);
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