AuxXxilium/linux_dsm_epyc7002
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4257d3ba3b
linux_dsm_epyc7002/drivers/gpu/drm/i915
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Chris Wilson 4257d3ba3b drm/i915: Allow the user to set bo into the DISPLAY cache domain 
This is primarily for the benefit of the create2 ioctl so that the
caller can avoid the later step of rebinding the bo with new PTE bits.
After introducing WT (and possibly GFDT) cacheing for display targets,
not everything in the display is earmarked as UC, and more importantly
what is is controlled by the kernel.

Note that set_cache_level/get_cache_level for DISPLAY is not necessarily
idempotent; get_cache_level may return UC for architectures that have no
special cache domain for the display engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-08-22 13:31:39 +02:00
..
dvo_ch7xxx.c drm/i915: dvo_ch7xxx: fix vsync polarity setting 2013-07-25 16:10:22 +02:00
dvo_ch7017.c
dvo_ivch.c
dvo_ns2501.c
dvo_sil164.c
dvo_tfp410.c
dvo.h
i915_debugfs.c drm/i915: Track when an object is pinned for use by the display engine 2013-08-10 11:19:51 +02:00
i915_dma.c drm/i915: Use Write-Through cacheing for the display plane on Iris 2013-08-22 13:31:38 +02:00
i915_drv.c drm/i915: Colocate all GT access routines in the same file 2013-07-25 15:21:50 +02:00
i915_drv.h drm/i915: Use Write-Through cacheing for the display plane on Iris 2013-08-22 13:31:38 +02:00
i915_gem_context.c drm/i915: mm_list is per VMA 2013-08-08 14:06:58 +02:00
i915_gem_debug.c drm/i915: Fix #endif comment 2013-08-09 10:45:52 +02:00
i915_gem_dmabuf.c drm/i915: fix dmabuf vmap support 2013-05-01 16:09:31 +10:00
i915_gem_evict.c drm/i915: mm_list is per VMA 2013-08-08 14:06:58 +02:00
i915_gem_execbuffer.c drm/i915: Only do a chipset flush after a clflush 2013-08-22 13:31:34 +02:00
i915_gem_gtt.c drm/i915: Use Write-Through cacheing for the display plane on Iris 2013-08-22 13:31:38 +02:00
i915_gem_stolen.c drm/i915: Allow the GPU to cache stolen memory 2013-08-10 11:24:18 +02:00
i915_gem_tiling.c drm/i915: plumb VM into bind/unbind code 2013-08-08 14:04:20 +02:00
i915_gem.c drm/i915: Allow the user to set bo into the DISPLAY cache domain 2013-08-22 13:31:39 +02:00
i915_gpu_error.c drm/i915: Update error capture for VMs 2013-08-08 14:08:37 +02:00
i915_ioc32.c
i915_irq.c drm/i915: drop unnecessary local variable to suppress build warning 2013-08-22 13:31:38 +02:00
i915_reg.h drm/i915: Use the watermark latency values from dev_priv for ILK/SNB/IVB too 2013-08-05 19:04:17 +02:00
i915_suspend.c Linux 3.10 2013-07-18 12:03:29 +02:00
i915_sysfs.c drm/i915: add error_state sysfs entry 2013-07-01 19:39:31 +02:00
i915_trace_points.c
i915_trace.h drm/i915: plumb VM into bind/unbind code 2013-08-08 14:04:20 +02:00
i915_ums.c drm/i915: scrap register address storage 2013-06-10 19:54:14 +02:00
intel_acpi.c i915: fix ACPI _DSM warning 2013-08-05 19:04:05 +02:00
intel_bios.c drm/i915: Organize VBT stuff inside drm_i915_private 2013-05-10 21:56:46 +02:00
intel_bios.h drm/i915: set CPT FDI RX polarity bits based on VBT 2013-04-18 09:43:31 +02:00
intel_crt.c drm/i915/crt: use native encoder->mode_set callback 2013-08-04 21:25:23 +02:00
intel_ddi.c drm/i915: remove use_fdi_mode argument from intel_prepare_ddi_buffers 2013-08-06 08:33:40 +02:00
intel_display.c drm/i915: Track when an object is pinned for use by the display engine 2013-08-10 11:19:51 +02:00
intel_dp.c drm/i915: rearrange vlv dp enable and pre_enable callbacks 2013-08-05 19:04:03 +02:00
intel_drv.h drm/i915: Make intel_set_mode() static 2013-08-09 10:46:15 +02:00
intel_dvo.c drm/i915/dvo: use native encoder ->mode_set callback 2013-08-04 21:25:21 +02:00
intel_fb.c drm/i915: Export intel_framebuffer_fini 2013-08-06 20:08:50 +02:00
intel_hdmi.c drm/i915/hmdi: Rename set_infoframe() to write_infoframe() 2013-08-08 14:04:51 +02:00
intel_i2c.c drm/i915: avoid premature DP AUX timeouts 2013-05-22 13:51:26 +02:00
intel_lvds.c drm/i915/lvds: use the native encoder ->mode_set callback 2013-08-04 21:25:25 +02:00
intel_modes.c drm/i915: Add "Automatic" mode for the "Broadcast RGB" property 2013-01-20 13:09:44 +01:00
intel_opregion.c drm/i915: tune down DIDL warning about too many outputs 2013-07-01 11:14:42 +02:00
intel_overlay.c drm/i915: Add VM to pin 2013-08-05 19:04:09 +02:00
intel_panel.c drm/i915: clean up crtc timings computation 2013-08-04 21:25:27 +02:00
intel_pm.c drm/i915: Fix FB WM for HSW 2013-08-09 20:27:43 +02:00
intel_ringbuffer.c drm/i915: Add VM to pin 2013-08-05 19:04:09 +02:00
intel_ringbuffer.h drm/i915: give more distinctive names to ring hangcheck action enums 2013-08-22 13:31:37 +02:00
intel_sdvo_regs.h
intel_sdvo.c i915: Fix SDVO potentially turning off randomly 2013-08-22 13:31:36 +02:00
intel_sideband.c drm/i915: change VLV IOSF sideband accessors to not return error code 2013-05-23 23:25:42 +02:00
intel_sprite.c drm/i915: Always call intel_update_sprite_watermarks() when disabling a plane 2013-08-08 14:11:15 +02:00
intel_tv.c drm/i915/tv: Use native encoder->mode_set callback 2013-08-04 21:25:22 +02:00
intel_uncore.c drm/i915: Convert the register access tracepoint to be conditional 2013-07-25 15:22:07 +02:00
Makefile drm/i915: Colocate all GT access routines in the same file 2013-07-25 15:21:50 +02:00