linux_dsm_epyc7002/drivers/gpu/drm/i915/display
Anshuman Gupta 1c4d821db9 drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
DC3CO is useful power state, when DMC detects PSR2 idle frame
while an active video playback, playing 30fps video on 60hz panel
is the classic example of this use case.

B.Specs:49196 has a restriction to enable DC3CO only for Video Playback.
It will be worthy to enable DC3CO after completion of each pageflip
and switch back to DC5 when display is idle because driver doesn't
differentiate between video playback and a normal pageflip.
We will use Frontbuffer flush call tgl_dc3co_flush() to enable DC3CO
state only for ORIGIN_FLIP flush call, because DC3CO state has primarily
targeted for VPB use case. We are not interested here for frontbuffer
invalidates calls because that triggers PSR2 exit, which will
explicitly disable DC3CO.

DC5 and DC6 saves more power, but can't be entered during video
playback because there are not enough idle frames in a row to meet
most PSR2 panel deep sleep entry requirement typically 4 frames.
As PSR2 existing implementation is using minimum 6 idle frames for
deep sleep, it is safer to enable DC5/6 after 6 idle frames
(By scheduling a delayed work of 6 idle frames, once DC3CO has been
enabled after a pageflip).

After manually waiting for 6 idle frames DC5/6 will be enabled and
PSR2 deep sleep idle frames will be restored to 6 idle frames, at this
point DMC will triggers DC5/6 once PSR2 enters to deep sleep after
6 idle frames.
In future when we will enable S/W PSR2 tracking, we can change the
PSR2 required deep sleep idle frames to 1 so DMC can trigger the
DC5/6 immediately after S/W manual waiting of 6 idle frames get
complete.

v2: calculated s/w state to switch over dc3co when there is an
    update. [Imre]
    Used cancel_delayed_work_sync() in order to avoid any race
    with already scheduled delayed work. [Imre]
v3: Cancel_delayed_work_sync() may blocked the commit work.
    hence dropping it, dc5_idle_thread() checks the valid wakeref before
    putting the reference count, which avoids any chances of dropping
    a zero wakeref. [Imre (IRC)]
v4: Used frontbuffer flush mechanism. [Imre]
v5: Used psr.pipe to extract frontbuffer busy bits. [Imre]
    Used cancel_delayed_work_sync() in encoder disable path. [Imre]
    Used mod_delayed_work() instead of cancelling and scheduling a
    delayed work. [Imre]
    Used psr.lock in tgl_dc5_idle_thread() to enable psr2 deep
    sleep. [Imre]
    Removed DC5_REQ_IDLE_FRAMES macro. [Imre]
v6: Used dc3co_exitline check instead of TGL and dc3co allowed_dc_mask
    checks, used delayed_work_pending with the psr lock and removed the
    psr2_deep_slp_disabled flag. [Imre]
v7: Code refactoring, moved most of functional code to inte_psr.c [Imre]
    Using frontbuffer_bits on psr.pipe check instead of
    busy_frontbuffer_bits. [Imre]
    Calculating dc3co_exit_delay in intel_psr_enable_locked. [Imre]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191003081738.22101-6-anshuman.gupta@intel.com
2019-10-08 11:05:28 +03:00
..
dvo_ch7xxx.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_ch7017.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_ivch.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_ns2501.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_sil164.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
dvo_tfp410.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
icl_dsi.c drm/i915: Wrappers for display register waits 2019-08-16 22:19:05 +01:00
intel_acpi.c
intel_acpi.h
intel_atomic_plane.c drm/i915: Rename planar linked plane variables 2019-09-25 13:30:16 +02:00
intel_atomic_plane.h drm/i915: Pass intel state to plane functions as well 2019-07-01 10:32:45 +02:00
intel_atomic.c drm/i915: Do not add all planes when checking scalers on glk+ 2019-09-25 13:34:06 +02:00
intel_atomic.h
intel_audio.c drm/i915: extend audio CDCLK>=2*BCLK constraint to more platforms 2019-10-04 15:44:34 +03:00
intel_audio.h
intel_bios.c drm/i915/vbt: Child device size remains unchanged through VBT 229 2019-10-07 10:24:31 -07:00
intel_bios.h drm: Move port definition back to i915 header 2019-08-30 14:08:26 +05:30
intel_bw.c drm/i915/tgl: Add memory type decoding for bandwidth checking 2019-09-25 15:52:08 -07:00
intel_bw.h drm/i915/bw: make intel_atomic_get_bw_state() static 2019-08-07 12:01:46 +03:00
intel_cdclk.c drm/i915: Extract intel_modeset_calc_cdclk() 2019-09-16 14:51:09 +03:00
intel_cdclk.h drm/i915: Extract intel_modeset_calc_cdclk() 2019-09-16 14:51:09 +03:00
intel_color.c Revert "drm/i915/color: Extract icl_read_luts()" 2019-09-25 11:11:13 +03:00
intel_color.h drm/i915/display: Add func to compare hw/sw gamma lut 2019-09-04 11:55:30 +03:00
intel_combo_phy.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_combo_phy.h drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespace 2019-07-10 18:22:34 -07:00
intel_connector.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_connector.h
intel_crt.c drm/i915: Clean up encoder->crtc_mask setup 2019-10-02 18:18:07 +03:00
intel_crt.h
intel_ddi.c drm/i915/tgl: Do modeset to enable and configure DC3CO exitline 2019-10-08 11:05:27 +03:00
intel_ddi.h
intel_display_power.c drm/i915/tgl: Switch between dc3co and dc5 based on display idleness 2019-10-08 11:05:28 +03:00
intel_display_power.h drm/i915/tgl: Switch between dc3co and dc5 based on display idleness 2019-10-08 11:05:28 +03:00
intel_display_types.h drm/i915/tgl: Do modeset to enable and configure DC3CO exitline 2019-10-08 11:05:27 +03:00
intel_display.c drm/i915/tgl: Do modeset to enable and configure DC3CO exitline 2019-10-08 11:05:27 +03:00
intel_display.h drm/i915/display: abstract all vgaarb access to intel_vga.[ch] 2019-10-02 13:31:54 +03:00
intel_dp_aux_backlight.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dp_aux_backlight.h
intel_dp_link_training.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dp_link_training.h
intel_dp_mst.c drm/i915: Limit MST modes based on plane size too 2019-10-02 17:21:48 +03:00
intel_dp_mst.h drm/i915/mst: un-inline intel_dp_mst_encoder_active_links() 2019-08-07 12:01:51 +03:00
intel_dp.c drm/i915/dp: remove static variable for aux last status 2019-10-04 15:10:27 +03:00
intel_dp.h drm/i915/dp: Fix dsc bpp calculations, v5. 2019-09-25 13:26:05 +02:00
intel_dpio_phy.c drm/i915: Wrappers for display register waits 2019-08-16 22:19:05 +01:00
intel_dpio_phy.h
intel_dpll_mgr.c drm/i915/tgl: Add the Thunderbolt PLL divider values 2019-10-04 13:43:42 +03:00
intel_dpll_mgr.h drm/i915/tgl: Add new pll ids 2019-07-11 16:31:12 -07:00
intel_dsb.c drm/i915: Pull i915_vma_pin under the vm->mutex 2019-10-04 15:39:02 +01:00
intel_dsb.h drm/i915/dsb: function to trigger workload execution of DSB. 2019-09-23 10:12:26 +03:00
intel_dsi_dcs_backlight.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dsi_dcs_backlight.h
intel_dsi_vbt.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dsi.c drm/i915: Don't advertise modes that exceed the max plane size 2019-09-19 20:28:57 +03:00
intel_dsi.h drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_dvo_dev.h
intel_dvo.c drm/i915: Clean up encoder->crtc_mask setup 2019-10-02 18:18:07 +03:00
intel_dvo.h
intel_fbc.c drm/i915: Disable FBC if BIOS reserved memory (stolen) is unavailable 2019-09-12 11:43:48 +01:00
intel_fbc.h
intel_fbdev.c drm/i915/stolen: make the object creation interface consistent 2019-10-04 19:27:41 +01:00
intel_fbdev.h
intel_fifo_underrun.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_fifo_underrun.h
intel_frontbuffer.c drm/i915: Coordinate i915_active with its own mutex 2019-10-04 15:39:12 +01:00
intel_frontbuffer.h drm/i915: Extract intel_frontbuffer active tracking 2019-08-16 09:51:11 +01:00
intel_gmbus.c drm/i915: introduce INTEL_DISPLAY_ENABLED() 2019-09-16 10:20:05 +03:00
intel_gmbus.h drm/i915: Move gmbus definitions out of i915_reg.h 2019-08-16 21:52:49 +01:00
intel_hdcp.c drm/i915/hdcp: Enable HDCP 1.4 and 2.2 on Gen12+ 2019-08-30 14:08:32 +05:30
intel_hdcp.h drm/i915/hdcp: update current transcoder into intel_hdcp 2019-08-30 14:08:30 +05:30
intel_hdmi.c drm/i915: Clean up encoder->crtc_mask setup 2019-10-02 18:18:07 +03:00
intel_hdmi.h drm: Move port definition back to i915 header 2019-08-30 14:08:26 +05:30
intel_hotplug.c drm/i915: Prefer encoder->name over port_name() 2019-09-02 18:43:28 +03:00
intel_hotplug.h drm: Move port definition back to i915 header 2019-08-30 14:08:26 +05:30
intel_lpe_audio.c drm/i915: add INTEL_NUM_PIPES() and use it 2019-09-11 22:33:20 +03:00
intel_lpe_audio.h
intel_lspcon.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_lspcon.h
intel_lvds.c drm/i915: Clean up encoder->crtc_mask setup 2019-10-02 18:18:07 +03:00
intel_lvds.h
intel_opregion.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_opregion.h
intel_overlay.c drm/i915/stolen: make the object creation interface consistent 2019-10-04 19:27:41 +01:00
intel_overlay.h
intel_panel.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_panel.h
intel_pipe_crc.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_pipe_crc.h
intel_psr.c drm/i915/tgl: Switch between dc3co and dc5 based on display idleness 2019-10-08 11:05:28 +03:00
intel_psr.h drm/i915: Do not unmask PSR interruption in IRQ postinstall 2019-08-22 13:09:24 -07:00
intel_quirks.c drm/i915: rename intel_drv.h to display/intel_display_types.h 2019-08-07 12:43:50 +03:00
intel_quirks.h
intel_sdvo_regs.h
intel_sdvo.c drm/i915: Clean up encoder->crtc_mask setup 2019-10-02 18:18:07 +03:00
intel_sdvo.h drm: Move port definition back to i915 header 2019-08-30 14:08:26 +05:30
intel_sprite.c drm/i915: Fix g4x sprite scaling stride check with GTT remapping 2019-10-02 17:21:48 +03:00
intel_sprite.h drm/i915: Replace is_planar_yuv_format() with drm_format_info_is_yuv_semiplanar() 2019-09-16 14:44:03 +03:00
intel_tc.c drm/i915/tc: Update DP_MODE programming 2019-09-27 10:40:17 -07:00
intel_tc.h drm/i915/tc: Update DP_MODE programming 2019-09-27 10:40:17 -07:00
intel_tv.c drm/i915: Clean up encoder->crtc_mask setup 2019-10-02 18:18:07 +03:00
intel_tv.h
intel_vbt_defs.h drm/i915/gen11: Allow usage of all GPIO pins 2019-08-19 07:51:12 -07:00
intel_vdsc.c drm/i915/dp: Fix DSC enable code to use cpu_transcoder instead of encoder->type 2019-08-22 14:15:47 -07:00
intel_vdsc.h
intel_vga.c drm/i915/vga: rename intel_vga_msr_write() to intel_vga_reset_io_mem() 2019-10-06 11:24:53 +03:00
intel_vga.h drm/i915/vga: rename intel_vga_msr_write() to intel_vga_reset_io_mem() 2019-10-06 11:24:53 +03:00
Makefile drm/i915: use upstream version of header tests 2019-07-30 12:11:57 +03:00
vlv_dsi_pll.c drm/i915: Wrappers for display register waits 2019-08-16 22:19:05 +01:00
vlv_dsi.c drm/i915: Use enum pipe consistently 2019-08-23 21:36:01 +03:00