mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 08:46:45 +07:00
96f1050d3d
Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
99 lines
1.9 KiB
C
99 lines
1.9 KiB
C
/*
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* Copyright 2007-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*
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* This file contains the simple DMA Implementation for Blackfin
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*/
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#include <linux/module.h>
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#include <asm/blackfin.h>
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#include <asm/dma.h>
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struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
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(struct dma_register *) DMA0_NEXT_DESC_PTR,
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(struct dma_register *) DMA1_NEXT_DESC_PTR,
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(struct dma_register *) DMA2_NEXT_DESC_PTR,
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(struct dma_register *) DMA3_NEXT_DESC_PTR,
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(struct dma_register *) DMA4_NEXT_DESC_PTR,
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(struct dma_register *) DMA5_NEXT_DESC_PTR,
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(struct dma_register *) DMA6_NEXT_DESC_PTR,
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(struct dma_register *) DMA7_NEXT_DESC_PTR,
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(struct dma_register *) DMA8_NEXT_DESC_PTR,
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(struct dma_register *) DMA9_NEXT_DESC_PTR,
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(struct dma_register *) DMA10_NEXT_DESC_PTR,
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(struct dma_register *) DMA11_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
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(struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
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};
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EXPORT_SYMBOL(dma_io_base_addr);
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int channel2irq(unsigned int channel)
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{
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int ret_irq = -1;
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switch (channel) {
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case CH_PPI:
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ret_irq = IRQ_PPI;
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break;
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case CH_EMAC_RX:
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ret_irq = IRQ_MAC_RX;
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break;
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case CH_EMAC_TX:
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ret_irq = IRQ_MAC_TX;
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break;
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case CH_UART1_RX:
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ret_irq = IRQ_UART1_RX;
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break;
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case CH_UART1_TX:
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ret_irq = IRQ_UART1_TX;
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break;
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case CH_SPORT0_RX:
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ret_irq = IRQ_SPORT0_RX;
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break;
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case CH_SPORT0_TX:
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ret_irq = IRQ_SPORT0_TX;
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break;
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case CH_SPORT1_RX:
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ret_irq = IRQ_SPORT1_RX;
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break;
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case CH_SPORT1_TX:
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ret_irq = IRQ_SPORT1_TX;
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break;
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case CH_SPI:
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ret_irq = IRQ_SPI;
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break;
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case CH_UART0_RX:
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ret_irq = IRQ_UART0_RX;
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break;
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case CH_UART0_TX:
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ret_irq = IRQ_UART0_TX;
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break;
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case CH_MEM_STREAM0_SRC:
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case CH_MEM_STREAM0_DEST:
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ret_irq = IRQ_MEM_DMA0;
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break;
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case CH_MEM_STREAM1_SRC:
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case CH_MEM_STREAM1_DEST:
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ret_irq = IRQ_MEM_DMA1;
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break;
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}
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return ret_irq;
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}
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