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4196b892d5
xtime_update() takes the xtime_lock itself. Signed-off-by: Torben Hohn <torbenh@gmx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: johnstul@us.ibm.com Cc: hch@infradead.org Cc: yong.zhang0@gmail.com LKML-Reference: <20110127145931.23248.33917.stgit@localhost> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
158 lines
3.7 KiB
C
158 lines
3.7 KiB
C
/*
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* arch/blackfin/kernel/time.c
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*
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* This file contains the Blackfin-specific time handling details.
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* Most of the stuff is located in the machine specific files.
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*
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* Copyright 2004-2008 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/module.h>
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#include <linux/profile.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <asm/blackfin.h>
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#include <asm/time.h>
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#include <asm/gptimers.h>
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/* This is an NTP setting */
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#define TICK_SIZE (tick_nsec / 1000)
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static struct irqaction bfin_timer_irq = {
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.name = "Blackfin Timer Tick",
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.flags = IRQF_DISABLED
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};
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#if defined(CONFIG_IPIPE)
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void __init setup_system_timer0(void)
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{
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/* Power down the core timer, just to play safe. */
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bfin_write_TCNTL(0);
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disable_gptimers(TIMER0bit);
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set_gptimer_status(0, TIMER_STATUS_TRUN0);
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while (get_gptimer_status(0) & TIMER_STATUS_TRUN0)
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udelay(10);
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set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */
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set_gptimer_period(TIMER0_id, get_sclk() / HZ);
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set_gptimer_pwidth(TIMER0_id, 1);
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SSYNC();
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enable_gptimers(TIMER0bit);
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}
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#else
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void __init setup_core_timer(void)
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{
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u32 tcount;
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/* power up the timer, but don't enable it just yet */
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bfin_write_TCNTL(1);
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CSYNC();
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/* the TSCALE prescaler counter */
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bfin_write_TSCALE(TIME_SCALE - 1);
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tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
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bfin_write_TPERIOD(tcount);
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bfin_write_TCOUNT(tcount);
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/* now enable the timer */
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CSYNC();
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bfin_write_TCNTL(7);
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}
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#endif
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static void __init
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time_sched_init(irqreturn_t(*timer_routine) (int, void *))
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{
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#if defined(CONFIG_IPIPE)
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setup_system_timer0();
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bfin_timer_irq.handler = timer_routine;
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setup_irq(IRQ_TIMER0, &bfin_timer_irq);
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#else
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setup_core_timer();
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bfin_timer_irq.handler = timer_routine;
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setup_irq(IRQ_CORETMR, &bfin_timer_irq);
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#endif
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}
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#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
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/*
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* Should return useconds since last timer tick
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*/
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u32 arch_gettimeoffset(void)
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{
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unsigned long offset;
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unsigned long clocks_per_jiffy;
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#if defined(CONFIG_IPIPE)
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clocks_per_jiffy = bfin_read_TIMER0_PERIOD();
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offset = bfin_read_TIMER0_COUNTER() / \
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(((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
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if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2))
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offset += (USEC_PER_SEC / HZ);
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#else
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clocks_per_jiffy = bfin_read_TPERIOD();
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offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \
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(((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
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/* Check if we just wrapped the counters and maybe missed a tick */
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if ((bfin_read_ILAT() & (1 << IRQ_CORETMR))
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&& (offset < (100000 / HZ / 2)))
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offset += (USEC_PER_SEC / HZ);
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#endif
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return offset;
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}
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#endif
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "xtime_update()" routine every clocktick
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*/
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#ifdef CONFIG_CORE_TIMER_IRQ_L1
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__attribute__((l1_text))
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#endif
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irqreturn_t timer_interrupt(int irq, void *dummy)
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{
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xtime_update(1);
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#ifdef CONFIG_IPIPE
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update_root_process_times(get_irq_regs());
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#else
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update_process_times(user_mode(get_irq_regs()));
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#endif
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profile_tick(CPU_PROFILING);
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return IRQ_HANDLED;
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}
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void read_persistent_clock(struct timespec *ts)
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{
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time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */
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ts->tv_sec = secs_since_1970;
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ts->tv_nsec = 0;
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}
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void __init time_init(void)
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{
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#ifdef CONFIG_RTC_DRV_BFIN
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/* [#2663] hack to filter junk RTC values that would cause
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* userspace to have to deal with time values greater than
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* 2^31 seconds (which uClibc cannot cope with yet)
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*/
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if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) {
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printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n");
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bfin_write_RTC_STAT(0);
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}
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#endif
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time_sched_init(timer_interrupt);
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}
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