Catalin Marinas 4150e50bf5 arm64: Use last level TLBI for user pte changes ... The flush_tlb_page() function is used on user address ranges when PTEs (or PMDs/PUDs for huge pages) were changed (attributes or clearing). For such cases, it is more efficient to invalidate only the last level of the TLB with the "tlbi vale1is" instruction. In the TLB shoot-down case, the TLB caching of the intermediate page table levels (pmd, pud, pgd) is handled by __flush_tlb_pgtable() via the __(pte|pmd|pud)_free_tlb() functions and it is not deferred to tlb_finish_mmu() (as of commit 285994a62c - "arm64: Invalidate the TLB corresponding to intermediate page table levels"). The tlb_flush() function only needs to invalidate the TLB for the last level of page tables; the __flush_tlb_range() function gains a fourth argument for last level TLBI. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>		2015-07-28 11:44:01 +01:00
..
boot	arm64: enable more compressed Image formats	2015-07-27 11:08:39 +01:00
configs	arm64: defconfig: Add Ceva ahci to the defconfig	2015-07-06 17:22:59 +01:00
crypto	Merge branch 'mvebu/drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc	2015-06-19 22:07:07 +08:00
include	arm64: Use last level TLBI for user pte changes	2015-07-28 11:44:01 +01:00
kernel	arm64: debug: rename enum debug_el to avoid symbol collision	2015-07-27 18:36:54 +01:00
kvm	arm64: kvm: Adopt new alternative assembler macros	2015-07-27 11:08:40 +01:00
lib	arm64: atomics: prefetch the destination word for write prior to stxr	2015-07-27 15:28:53 +01:00
mm	arm64: mm: mark create_mapping as __init	2015-07-28 11:36:09 +01:00
net	arm64: bpf: fix endianness conversion bugs	2015-06-26 14:15:39 +01:00
xen
Kconfig	arm64: kconfig: group the v8.1 features together	2015-07-27 15:54:13 +01:00
Kconfig.debug
Makefile	arm64: atomics: patch in lse instructions when supported by the CPU	2015-07-27 15:28:50 +01:00