mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 08:55:05 +07:00
8fc01fc067
This commit allows this driver to handle devices with non SYT-Match sampling clock source. When sampling clock source is SYT-Match mode, devices handle 'presentation timestamp' in received packets and generates sampling clock according to the information. In this case, driver is synchronization master and must transfer correct value in SYT field of each packets in outgoing stream, then the outgoing stream is a master stream. On the other hand, non SYT-Match mode, devices do this. So drivers must pick up the value in SYT field of incoming packets and use the value for outgoing stream. Currently firewire-lib module achieve this work. Furthermore, without SYT-Match and internal clock source, the sampling rate should be fixed for the other devices connected to the handled device. This commit add a restriction of sampling rate at this situation. With these implementations, this driver has no need to set clock source. This commit remove set function. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Acked-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
383 lines
8.9 KiB
C
383 lines
8.9 KiB
C
/*
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* dice_transaction.c - a part of driver for Dice based devices
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*
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* Copyright (c) Clemens Ladisch
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* Copyright (c) 2014 Takashi Sakamoto
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*
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* Licensed under the terms of the GNU General Public License, version 2.
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*/
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#include "dice.h"
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#define NOTIFICATION_TIMEOUT_MS 100
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static u64 get_subaddr(struct snd_dice *dice, enum snd_dice_addr_type type,
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u64 offset)
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{
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switch (type) {
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case SND_DICE_ADDR_TYPE_TX:
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offset += dice->tx_offset;
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break;
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case SND_DICE_ADDR_TYPE_RX:
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offset += dice->rx_offset;
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break;
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case SND_DICE_ADDR_TYPE_SYNC:
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offset += dice->sync_offset;
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break;
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case SND_DICE_ADDR_TYPE_RSRV:
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offset += dice->rsrv_offset;
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break;
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case SND_DICE_ADDR_TYPE_GLOBAL:
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default:
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offset += dice->global_offset;
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break;
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}
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offset += DICE_PRIVATE_SPACE;
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return offset;
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}
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int snd_dice_transaction_write(struct snd_dice *dice,
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enum snd_dice_addr_type type,
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unsigned int offset, void *buf, unsigned int len)
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{
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return snd_fw_transaction(dice->unit,
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(len == 4) ? TCODE_WRITE_QUADLET_REQUEST :
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TCODE_WRITE_BLOCK_REQUEST,
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get_subaddr(dice, type, offset), buf, len, 0);
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}
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int snd_dice_transaction_read(struct snd_dice *dice,
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enum snd_dice_addr_type type, unsigned int offset,
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void *buf, unsigned int len)
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{
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return snd_fw_transaction(dice->unit,
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(len == 4) ? TCODE_READ_QUADLET_REQUEST :
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TCODE_READ_BLOCK_REQUEST,
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get_subaddr(dice, type, offset), buf, len, 0);
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}
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static unsigned int get_clock_info(struct snd_dice *dice, __be32 *info)
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{
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return snd_dice_transaction_read_global(dice, GLOBAL_CLOCK_SELECT,
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info, 4);
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}
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static int set_clock_info(struct snd_dice *dice,
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unsigned int rate, unsigned int source)
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{
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unsigned int retries = 3;
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unsigned int i;
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__be32 info;
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u32 mask;
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u32 clock;
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int err;
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retry:
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err = get_clock_info(dice, &info);
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if (err < 0)
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goto end;
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clock = be32_to_cpu(info);
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if (source != UINT_MAX) {
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mask = CLOCK_SOURCE_MASK;
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clock &= ~mask;
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clock |= source;
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}
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if (rate != UINT_MAX) {
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for (i = 0; i < ARRAY_SIZE(snd_dice_rates); i++) {
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if (snd_dice_rates[i] == rate)
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break;
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}
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if (i == ARRAY_SIZE(snd_dice_rates)) {
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err = -EINVAL;
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goto end;
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}
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mask = CLOCK_RATE_MASK;
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clock &= ~mask;
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clock |= i << CLOCK_RATE_SHIFT;
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}
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info = cpu_to_be32(clock);
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if (completion_done(&dice->clock_accepted))
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reinit_completion(&dice->clock_accepted);
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err = snd_dice_transaction_write_global(dice, GLOBAL_CLOCK_SELECT,
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&info, 4);
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if (err < 0)
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goto end;
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/* Timeout means it's invalid request, probably bus reset occurred. */
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if (wait_for_completion_timeout(&dice->clock_accepted,
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msecs_to_jiffies(NOTIFICATION_TIMEOUT_MS)) == 0) {
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if (retries-- == 0) {
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err = -ETIMEDOUT;
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goto end;
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}
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err = snd_dice_transaction_reinit(dice);
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if (err < 0)
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goto end;
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msleep(500); /* arbitrary */
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goto retry;
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}
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end:
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return err;
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}
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int snd_dice_transaction_get_clock_source(struct snd_dice *dice,
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unsigned int *source)
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{
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__be32 info;
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int err;
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err = get_clock_info(dice, &info);
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if (err >= 0)
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*source = be32_to_cpu(info) & CLOCK_SOURCE_MASK;
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return err;
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}
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int snd_dice_transaction_get_rate(struct snd_dice *dice, unsigned int *rate)
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{
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__be32 info;
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unsigned int index;
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int err;
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err = get_clock_info(dice, &info);
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if (err < 0)
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goto end;
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index = (be32_to_cpu(info) & CLOCK_RATE_MASK) >> CLOCK_RATE_SHIFT;
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if (index >= SND_DICE_RATES_COUNT) {
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err = -ENOSYS;
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goto end;
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}
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*rate = snd_dice_rates[index];
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end:
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return err;
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}
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int snd_dice_transaction_set_rate(struct snd_dice *dice, unsigned int rate)
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{
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return set_clock_info(dice, rate, UINT_MAX);
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}
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int snd_dice_transaction_set_enable(struct snd_dice *dice)
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{
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__be32 value;
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int err = 0;
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if (dice->global_enabled)
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goto end;
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value = cpu_to_be32(1);
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err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
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get_subaddr(dice, SND_DICE_ADDR_TYPE_GLOBAL,
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GLOBAL_ENABLE),
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&value, 4,
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FW_FIXED_GENERATION | dice->owner_generation);
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if (err < 0)
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goto end;
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dice->global_enabled = true;
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end:
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return err;
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}
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void snd_dice_transaction_clear_enable(struct snd_dice *dice)
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{
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__be32 value;
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value = 0;
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snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
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get_subaddr(dice, SND_DICE_ADDR_TYPE_GLOBAL,
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GLOBAL_ENABLE),
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&value, 4, FW_QUIET |
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FW_FIXED_GENERATION | dice->owner_generation);
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dice->global_enabled = false;
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}
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static void dice_notification(struct fw_card *card, struct fw_request *request,
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int tcode, int destination, int source,
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int generation, unsigned long long offset,
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void *data, size_t length, void *callback_data)
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{
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struct snd_dice *dice = callback_data;
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u32 bits;
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unsigned long flags;
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if (tcode != TCODE_WRITE_QUADLET_REQUEST) {
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fw_send_response(card, request, RCODE_TYPE_ERROR);
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return;
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}
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if ((offset & 3) != 0) {
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fw_send_response(card, request, RCODE_ADDRESS_ERROR);
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return;
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}
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bits = be32_to_cpup(data);
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spin_lock_irqsave(&dice->lock, flags);
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dice->notification_bits |= bits;
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spin_unlock_irqrestore(&dice->lock, flags);
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fw_send_response(card, request, RCODE_COMPLETE);
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if (bits & NOTIFY_CLOCK_ACCEPTED)
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complete(&dice->clock_accepted);
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wake_up(&dice->hwdep_wait);
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}
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static int register_notification_address(struct snd_dice *dice, bool retry)
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{
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struct fw_device *device = fw_parent_device(dice->unit);
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__be64 *buffer;
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unsigned int retries;
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int err;
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retries = (retry) ? 3 : 0;
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buffer = kmalloc(2 * 8, GFP_KERNEL);
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if (!buffer)
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return -ENOMEM;
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for (;;) {
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buffer[0] = cpu_to_be64(OWNER_NO_OWNER);
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buffer[1] = cpu_to_be64(
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((u64)device->card->node_id << OWNER_NODE_SHIFT) |
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dice->notification_handler.offset);
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dice->owner_generation = device->generation;
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smp_rmb(); /* node_id vs. generation */
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err = snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
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get_subaddr(dice,
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SND_DICE_ADDR_TYPE_GLOBAL,
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GLOBAL_OWNER),
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buffer, 2 * 8,
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FW_FIXED_GENERATION |
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dice->owner_generation);
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if (err == 0) {
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/* success */
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if (buffer[0] == cpu_to_be64(OWNER_NO_OWNER))
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break;
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/* The address seems to be already registered. */
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if (buffer[0] == buffer[1])
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break;
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dev_err(&dice->unit->device,
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"device is already in use\n");
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err = -EBUSY;
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}
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if (err != -EAGAIN || retries-- > 0)
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break;
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msleep(20);
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}
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kfree(buffer);
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if (err < 0)
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dice->owner_generation = -1;
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return err;
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}
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static void unregister_notification_address(struct snd_dice *dice)
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{
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struct fw_device *device = fw_parent_device(dice->unit);
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__be64 *buffer;
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buffer = kmalloc(2 * 8, GFP_KERNEL);
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if (buffer == NULL)
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return;
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buffer[0] = cpu_to_be64(
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((u64)device->card->node_id << OWNER_NODE_SHIFT) |
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dice->notification_handler.offset);
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buffer[1] = cpu_to_be64(OWNER_NO_OWNER);
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snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP,
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get_subaddr(dice, SND_DICE_ADDR_TYPE_GLOBAL,
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GLOBAL_OWNER),
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buffer, 2 * 8, FW_QUIET |
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FW_FIXED_GENERATION | dice->owner_generation);
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kfree(buffer);
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dice->owner_generation = -1;
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}
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void snd_dice_transaction_destroy(struct snd_dice *dice)
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{
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struct fw_address_handler *handler = &dice->notification_handler;
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if (handler->callback_data == NULL)
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return;
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unregister_notification_address(dice);
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fw_core_remove_address_handler(handler);
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handler->callback_data = NULL;
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}
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int snd_dice_transaction_reinit(struct snd_dice *dice)
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{
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struct fw_address_handler *handler = &dice->notification_handler;
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if (handler->callback_data == NULL)
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return -EINVAL;
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return register_notification_address(dice, false);
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}
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int snd_dice_transaction_init(struct snd_dice *dice)
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{
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struct fw_address_handler *handler = &dice->notification_handler;
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__be32 *pointers;
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int err;
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/* Use the same way which dice_interface_check() does. */
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pointers = kmalloc(sizeof(__be32) * 10, GFP_KERNEL);
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if (pointers == NULL)
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return -ENOMEM;
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/* Get offsets for sub-addresses */
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err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
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DICE_PRIVATE_SPACE,
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pointers, sizeof(__be32) * 10, 0);
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if (err < 0)
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goto end;
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/* Allocation callback in address space over host controller */
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handler->length = 4;
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handler->address_callback = dice_notification;
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handler->callback_data = dice;
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err = fw_core_add_address_handler(handler, &fw_high_memory_region);
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if (err < 0) {
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handler->callback_data = NULL;
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goto end;
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}
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/* Register the address space */
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err = register_notification_address(dice, true);
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if (err < 0) {
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fw_core_remove_address_handler(handler);
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handler->callback_data = NULL;
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goto end;
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}
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dice->global_offset = be32_to_cpu(pointers[0]) * 4;
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dice->tx_offset = be32_to_cpu(pointers[2]) * 4;
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dice->rx_offset = be32_to_cpu(pointers[4]) * 4;
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dice->sync_offset = be32_to_cpu(pointers[6]) * 4;
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dice->rsrv_offset = be32_to_cpu(pointers[8]) * 4;
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/* Set up later. */
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if (be32_to_cpu(pointers[1]) * 4 >= GLOBAL_CLOCK_CAPABILITIES + 4)
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dice->clock_caps = 1;
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end:
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kfree(pointers);
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return err;
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}
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