mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 23:05:23 +07:00
50acfb2b76
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 97 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.025053186@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
69 lines
1.4 KiB
C
69 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Copyright (C) 2015 Regents of the University of California
|
|
*/
|
|
|
|
#ifndef _ASM_RISCV_ASM_H
|
|
#define _ASM_RISCV_ASM_H
|
|
|
|
#ifdef __ASSEMBLY__
|
|
#define __ASM_STR(x) x
|
|
#else
|
|
#define __ASM_STR(x) #x
|
|
#endif
|
|
|
|
#if __riscv_xlen == 64
|
|
#define __REG_SEL(a, b) __ASM_STR(a)
|
|
#elif __riscv_xlen == 32
|
|
#define __REG_SEL(a, b) __ASM_STR(b)
|
|
#else
|
|
#error "Unexpected __riscv_xlen"
|
|
#endif
|
|
|
|
#define REG_L __REG_SEL(ld, lw)
|
|
#define REG_S __REG_SEL(sd, sw)
|
|
#define SZREG __REG_SEL(8, 4)
|
|
#define LGREG __REG_SEL(3, 2)
|
|
|
|
#if __SIZEOF_POINTER__ == 8
|
|
#ifdef __ASSEMBLY__
|
|
#define RISCV_PTR .dword
|
|
#define RISCV_SZPTR 8
|
|
#define RISCV_LGPTR 3
|
|
#else
|
|
#define RISCV_PTR ".dword"
|
|
#define RISCV_SZPTR "8"
|
|
#define RISCV_LGPTR "3"
|
|
#endif
|
|
#elif __SIZEOF_POINTER__ == 4
|
|
#ifdef __ASSEMBLY__
|
|
#define RISCV_PTR .word
|
|
#define RISCV_SZPTR 4
|
|
#define RISCV_LGPTR 2
|
|
#else
|
|
#define RISCV_PTR ".word"
|
|
#define RISCV_SZPTR "4"
|
|
#define RISCV_LGPTR "2"
|
|
#endif
|
|
#else
|
|
#error "Unexpected __SIZEOF_POINTER__"
|
|
#endif
|
|
|
|
#if (__SIZEOF_INT__ == 4)
|
|
#define RISCV_INT __ASM_STR(.word)
|
|
#define RISCV_SZINT __ASM_STR(4)
|
|
#define RISCV_LGINT __ASM_STR(2)
|
|
#else
|
|
#error "Unexpected __SIZEOF_INT__"
|
|
#endif
|
|
|
|
#if (__SIZEOF_SHORT__ == 2)
|
|
#define RISCV_SHORT __ASM_STR(.half)
|
|
#define RISCV_SZSHORT __ASM_STR(2)
|
|
#define RISCV_LGSHORT __ASM_STR(1)
|
|
#else
|
|
#error "Unexpected __SIZEOF_SHORT__"
|
|
#endif
|
|
|
|
#endif /* _ASM_RISCV_ASM_H */
|