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e70dce73be
When an SError arrives during single-step both the SError and debug exceptions may be pending when the step is completed, and the architecture doesn't define the ordering of the two. This means that we can observe en SError even though we've just completed a step, without receiving a debug exception. In that case the DBG_SPSR_SS bit will have flipped as the instruction executed. After handling the abort in handle_exit() we test to see if the bit is clear and we were single-stepping before deciding if we need to exit to user space. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
278 lines
7.5 KiB
C
278 lines
7.5 KiB
C
/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Derived from arch/arm/kvm/handle_exit.c:
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <asm/esr.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_coproc.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_mmu.h>
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#include <asm/kvm_psci.h>
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#include <asm/debug-monitors.h>
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#define CREATE_TRACE_POINTS
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#include "trace.h"
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typedef int (*exit_handle_fn)(struct kvm_vcpu *, struct kvm_run *);
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static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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int ret;
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trace_kvm_hvc_arm64(*vcpu_pc(vcpu), vcpu_get_reg(vcpu, 0),
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kvm_vcpu_hvc_get_imm(vcpu));
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vcpu->stat.hvc_exit_stat++;
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ret = kvm_psci_call(vcpu);
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if (ret < 0) {
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kvm_inject_undefined(vcpu);
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return 1;
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}
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return ret;
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}
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static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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kvm_inject_undefined(vcpu);
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return 1;
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}
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/*
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* Guest access to FP/ASIMD registers are routed to this handler only
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* when the system doesn't support FP/ASIMD.
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*/
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static int handle_no_fpsimd(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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kvm_inject_undefined(vcpu);
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return 1;
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}
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/**
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* kvm_handle_wfx - handle a wait-for-interrupts or wait-for-event
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* instruction executed by a guest
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*
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* @vcpu: the vcpu pointer
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*
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* WFE: Yield the CPU and come back to this vcpu when the scheduler
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* decides to.
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* WFI: Simply call kvm_vcpu_block(), which will halt execution of
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* world-switches and schedule other host processes until there is an
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* incoming IRQ or FIQ to the VM.
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*/
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static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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if (kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WFx_ISS_WFE) {
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trace_kvm_wfx_arm64(*vcpu_pc(vcpu), true);
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vcpu->stat.wfe_exit_stat++;
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kvm_vcpu_on_spin(vcpu, vcpu_mode_priv(vcpu));
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} else {
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trace_kvm_wfx_arm64(*vcpu_pc(vcpu), false);
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vcpu->stat.wfi_exit_stat++;
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kvm_vcpu_block(vcpu);
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kvm_clear_request(KVM_REQ_UNHALT, vcpu);
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}
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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return 1;
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}
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/**
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* kvm_handle_guest_debug - handle a debug exception instruction
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*
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* @vcpu: the vcpu pointer
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* @run: access to the kvm_run structure for results
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*
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* We route all debug exceptions through the same handler. If both the
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* guest and host are using the same debug facilities it will be up to
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* userspace to re-inject the correct exception for guest delivery.
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*
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* @return: 0 (while setting run->exit_reason), -1 for error
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*/
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static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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int ret = 0;
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run->exit_reason = KVM_EXIT_DEBUG;
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run->debug.arch.hsr = hsr;
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switch (ESR_ELx_EC(hsr)) {
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case ESR_ELx_EC_WATCHPT_LOW:
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run->debug.arch.far = vcpu->arch.fault.far_el2;
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/* fall through */
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case ESR_ELx_EC_SOFTSTP_LOW:
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case ESR_ELx_EC_BREAKPT_LOW:
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case ESR_ELx_EC_BKPT32:
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case ESR_ELx_EC_BRK64:
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break;
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default:
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kvm_err("%s: un-handled case hsr: %#08x\n",
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__func__, (unsigned int) hsr);
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ret = -1;
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break;
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}
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return ret;
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}
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static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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kvm_pr_unimpl("Unknown exception class: hsr: %#08x -- %s\n",
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hsr, esr_get_class_string(hsr));
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kvm_inject_undefined(vcpu);
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return 1;
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}
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static int handle_sve(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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/* Until SVE is supported for guests: */
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kvm_inject_undefined(vcpu);
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return 1;
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}
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static exit_handle_fn arm_exit_handlers[] = {
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[0 ... ESR_ELx_EC_MAX] = kvm_handle_unknown_ec,
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[ESR_ELx_EC_WFx] = kvm_handle_wfx,
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[ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32,
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[ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64,
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[ESR_ELx_EC_CP14_MR] = kvm_handle_cp14_32,
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[ESR_ELx_EC_CP14_LS] = kvm_handle_cp14_load_store,
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[ESR_ELx_EC_CP14_64] = kvm_handle_cp14_64,
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[ESR_ELx_EC_HVC32] = handle_hvc,
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[ESR_ELx_EC_SMC32] = handle_smc,
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[ESR_ELx_EC_HVC64] = handle_hvc,
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[ESR_ELx_EC_SMC64] = handle_smc,
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[ESR_ELx_EC_SYS64] = kvm_handle_sys_reg,
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[ESR_ELx_EC_SVE] = handle_sve,
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[ESR_ELx_EC_IABT_LOW] = kvm_handle_guest_abort,
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[ESR_ELx_EC_DABT_LOW] = kvm_handle_guest_abort,
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[ESR_ELx_EC_SOFTSTP_LOW]= kvm_handle_guest_debug,
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[ESR_ELx_EC_WATCHPT_LOW]= kvm_handle_guest_debug,
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[ESR_ELx_EC_BREAKPT_LOW]= kvm_handle_guest_debug,
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[ESR_ELx_EC_BKPT32] = kvm_handle_guest_debug,
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[ESR_ELx_EC_BRK64] = kvm_handle_guest_debug,
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[ESR_ELx_EC_FP_ASIMD] = handle_no_fpsimd,
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};
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static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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u8 hsr_ec = ESR_ELx_EC(hsr);
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return arm_exit_handlers[hsr_ec];
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}
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/*
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* We may be single-stepping an emulated instruction. If the emulation
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* has been completed in the kernel, we can return to userspace with a
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* KVM_EXIT_DEBUG, otherwise userspace needs to complete its
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* emulation first.
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*/
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static int handle_trap_exceptions(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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int handled;
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/*
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* See ARM ARM B1.14.1: "Hyp traps on instructions
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* that fail their condition code check"
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*/
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if (!kvm_condition_valid(vcpu)) {
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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handled = 1;
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} else {
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exit_handle_fn exit_handler;
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exit_handler = kvm_get_exit_handler(vcpu);
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handled = exit_handler(vcpu, run);
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}
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/*
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* kvm_arm_handle_step_debug() sets the exit_reason on the kvm_run
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* structure if we need to return to userspace.
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*/
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if (handled > 0 && kvm_arm_handle_step_debug(vcpu, run))
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handled = 0;
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return handled;
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}
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/*
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* Return > 0 to return to guest, < 0 on error, 0 (and set exit_reason) on
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* proper exit to userspace.
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*/
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int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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int exception_index)
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{
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if (ARM_SERROR_PENDING(exception_index)) {
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u8 hsr_ec = ESR_ELx_EC(kvm_vcpu_get_hsr(vcpu));
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/*
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* HVC/SMC already have an adjusted PC, which we need
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* to correct in order to return to after having
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* injected the SError.
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*/
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if (hsr_ec == ESR_ELx_EC_HVC32 || hsr_ec == ESR_ELx_EC_HVC64 ||
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hsr_ec == ESR_ELx_EC_SMC32 || hsr_ec == ESR_ELx_EC_SMC64) {
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u32 adj = kvm_vcpu_trap_il_is32bit(vcpu) ? 4 : 2;
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*vcpu_pc(vcpu) -= adj;
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}
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kvm_inject_vabt(vcpu);
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return 1;
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}
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exception_index = ARM_EXCEPTION_CODE(exception_index);
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switch (exception_index) {
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case ARM_EXCEPTION_IRQ:
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return 1;
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case ARM_EXCEPTION_EL1_SERROR:
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kvm_inject_vabt(vcpu);
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/* We may still need to return for single-step */
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if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS)
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&& kvm_arm_handle_step_debug(vcpu, run))
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return 0;
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else
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return 1;
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case ARM_EXCEPTION_TRAP:
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return handle_trap_exceptions(vcpu, run);
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case ARM_EXCEPTION_HYP_GONE:
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/*
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* EL2 has been reset to the hyp-stub. This happens when a guest
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* is pre-empted by kvm_reboot()'s shutdown call.
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*/
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run->exit_reason = KVM_EXIT_FAIL_ENTRY;
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return 0;
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default:
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kvm_pr_unimpl("Unsupported exception type: %d",
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exception_index);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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return 0;
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}
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}
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