mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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dd0cdd8882
Move omap1 FS USB platform init code into mach-omap1/usb.c Signed-off-by: Tony Lindgren <tony@atomide.com>
531 lines
12 KiB
C
531 lines
12 KiB
C
/*
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* Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
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*
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* Copyright (C) 2004 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <plat/mux.h>
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#include <plat/usb.h>
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/* These routines should handle the standard chip-specific modes
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* for usb0/1/2 ports, covering basic mux and transceiver setup.
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*
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* Some board-*.c files will need to set up additional mux options,
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* like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
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*/
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/* TESTED ON:
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* - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
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* - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
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* - 5912 OSK UDC, with *nonstandard* A-to-A cable
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* - 1510 Innovator UDC with bundled usb0 cable
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* - 1510 Innovator OHCI with bundled usb1/usb2 cable
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* - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
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* - 1710 custom development board using alternate pin group
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* - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
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*/
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#define INT_USB_IRQ_GEN IH2_BASE + 20
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#define INT_USB_IRQ_NISO IH2_BASE + 30
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#define INT_USB_IRQ_ISO IH2_BASE + 29
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#define INT_USB_IRQ_HGEN INT_USB_HHC_1
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#define INT_USB_IRQ_OTG IH2_BASE + 8
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#ifdef CONFIG_USB_GADGET_OMAP
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static struct resource udc_resources[] = {
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/* order is significant! */
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{ /* registers */
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.start = UDC_BASE,
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.end = UDC_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, { /* general IRQ */
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.start = INT_USB_IRQ_GEN,
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.flags = IORESOURCE_IRQ,
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}, { /* PIO IRQ */
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.start = INT_USB_IRQ_NISO,
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.flags = IORESOURCE_IRQ,
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}, { /* SOF IRQ */
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.start = INT_USB_IRQ_ISO,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dmamask = ~(u32)0;
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static struct platform_device udc_device = {
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.name = "omap_udc",
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.id = -1,
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.dev = {
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.dma_mask = &udc_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(udc_resources),
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.resource = udc_resources,
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};
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static inline void udc_device_init(struct omap_usb_config *pdata)
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{
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/* IRQ numbers for omap7xx */
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if(cpu_is_omap7xx()) {
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udc_resources[1].start = INT_7XX_USB_GENI;
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udc_resources[2].start = INT_7XX_USB_NON_ISO;
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udc_resources[3].start = INT_7XX_USB_ISO;
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}
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pdata->udc_device = &udc_device;
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}
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#else
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static inline void udc_device_init(struct omap_usb_config *pdata)
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{
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}
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#endif
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#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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/* The dmamask must be set for OHCI to work */
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static u64 ohci_dmamask = ~(u32)0;
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static struct resource ohci_resources[] = {
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{
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.start = OMAP_OHCI_BASE,
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.end = OMAP_OHCI_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_IRQ_HGEN,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device ohci_device = {
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.name = "ohci",
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.id = -1,
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.dev = {
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.dma_mask = &ohci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(ohci_resources),
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.resource = ohci_resources,
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};
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static inline void ohci_device_init(struct omap_usb_config *pdata)
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{
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if (cpu_is_omap7xx())
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ohci_resources[1].start = INT_7XX_USB_HHC_1;
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pdata->ohci_device = &ohci_device;
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}
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#else
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static inline void ohci_device_init(struct omap_usb_config *pdata)
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{
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}
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#endif
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#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
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static struct resource otg_resources[] = {
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/* order is significant! */
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{
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.start = OTG_BASE,
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.end = OTG_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = INT_USB_IRQ_OTG,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device otg_device = {
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.name = "omap_otg",
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.id = -1,
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.num_resources = ARRAY_SIZE(otg_resources),
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.resource = otg_resources,
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};
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static inline void otg_device_init(struct omap_usb_config *pdata)
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{
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if (cpu_is_omap7xx())
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otg_resources[1].start = INT_7XX_USB_OTG;
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pdata->otg_device = &otg_device;
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}
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#else
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static inline void otg_device_init(struct omap_usb_config *pdata)
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{
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}
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#endif
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u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
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{
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u32 syscon1 = 0;
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if (nwires == 0) {
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if (!cpu_is_omap15xx()) {
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u32 l;
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/* pulldown D+/D- */
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~(3 << 1);
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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return 0;
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}
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if (is_device) {
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if (cpu_is_omap7xx()) {
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omap_cfg_reg(AA17_7XX_USB_DM);
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omap_cfg_reg(W16_7XX_USB_PU_EN);
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omap_cfg_reg(W17_7XX_USB_VBUSI);
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omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
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omap_cfg_reg(W19_7XX_USB_DCRST);
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} else
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omap_cfg_reg(W4_USB_PUEN);
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}
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if (nwires == 2) {
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u32 l;
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// omap_cfg_reg(P9_USB_DP);
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// omap_cfg_reg(R8_USB_DM);
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if (cpu_is_omap15xx()) {
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/* This works on 1510-Innovator */
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return 0;
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}
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/* NOTES:
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* - peripheral should configure VBUS detection!
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* - only peripherals may use the internal D+/D- pulldowns
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* - OTG support on this port not yet written
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*/
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/* Don't do this for omap7xx -- it causes USB to not work correctly */
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if (!cpu_is_omap7xx()) {
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~(7 << 4);
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if (!is_device)
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l |= (3 << 1);
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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return 3 << 16;
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}
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/* alternate pin config, external transceiver */
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if (cpu_is_omap15xx()) {
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printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
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return 0;
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}
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omap_cfg_reg(V6_USB0_TXD);
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omap_cfg_reg(W9_USB0_TXEN);
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omap_cfg_reg(W5_USB0_SE0);
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if (nwires != 3)
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omap_cfg_reg(Y5_USB0_RCV);
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/* NOTE: SPEED and SUSP aren't configured here. OTG hosts
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* may be able to use I2C requests to set those bits along
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* with VBUS switching and overcurrent detection.
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*/
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if (nwires != 6) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~CONF_USB2_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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switch (nwires) {
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case 3:
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syscon1 = 2;
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break;
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case 4:
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syscon1 = 1;
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break;
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case 6:
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syscon1 = 3;
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{
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u32 l;
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omap_cfg_reg(AA9_USB0_VP);
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omap_cfg_reg(R9_USB0_VM);
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l |= CONF_USB2_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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break;
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default:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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0, nwires);
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}
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return syscon1 << 16;
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}
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u32 __init omap1_usb1_init(unsigned nwires)
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{
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u32 syscon1 = 0;
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if (!cpu_is_omap15xx() && nwires != 6) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~CONF_USB1_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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if (nwires == 0)
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return 0;
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/* external transceiver */
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omap_cfg_reg(USB1_TXD);
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omap_cfg_reg(USB1_TXEN);
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if (nwires != 3)
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omap_cfg_reg(USB1_RCV);
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB1_SEO);
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omap_cfg_reg(USB1_SPEED);
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// SUSP
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} else if (cpu_is_omap1610() || cpu_is_omap5912()) {
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omap_cfg_reg(W13_1610_USB1_SE0);
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omap_cfg_reg(R13_1610_USB1_SPEED);
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// SUSP
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} else if (cpu_is_omap1710()) {
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omap_cfg_reg(R13_1710_USB1_SE0);
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// SUSP
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} else {
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pr_debug("usb%d cpu unrecognized\n", 1);
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return 0;
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}
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switch (nwires) {
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case 2:
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goto bad;
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case 3:
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syscon1 = 2;
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break;
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case 4:
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syscon1 = 1;
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break;
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case 6:
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syscon1 = 3;
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omap_cfg_reg(USB1_VP);
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omap_cfg_reg(USB1_VM);
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if (!cpu_is_omap15xx()) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l |= CONF_USB1_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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break;
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default:
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bad:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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1, nwires);
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}
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return syscon1 << 20;
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}
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u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
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{
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u32 syscon1 = 0;
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/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
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if (alt_pingroup || nwires == 0)
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return 0;
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if (!cpu_is_omap15xx() && nwires != 6) {
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u32 l;
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l &= ~CONF_USB2_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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/* external transceiver */
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB2_TXD);
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omap_cfg_reg(USB2_TXEN);
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omap_cfg_reg(USB2_SEO);
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if (nwires != 3)
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omap_cfg_reg(USB2_RCV);
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/* there is no USB2_SPEED */
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} else if (cpu_is_omap16xx()) {
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omap_cfg_reg(V6_USB2_TXD);
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omap_cfg_reg(W9_USB2_TXEN);
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omap_cfg_reg(W5_USB2_SE0);
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if (nwires != 3)
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omap_cfg_reg(Y5_USB2_RCV);
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// FIXME omap_cfg_reg(USB2_SPEED);
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} else {
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pr_debug("usb%d cpu unrecognized\n", 1);
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return 0;
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}
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// omap_cfg_reg(USB2_SUSP);
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switch (nwires) {
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case 2:
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goto bad;
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case 3:
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syscon1 = 2;
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break;
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case 4:
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syscon1 = 1;
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break;
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case 5:
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goto bad;
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case 6:
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syscon1 = 3;
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB2_VP);
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omap_cfg_reg(USB2_VM);
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} else {
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u32 l;
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omap_cfg_reg(AA9_USB2_VP);
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omap_cfg_reg(R9_USB2_VM);
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l = omap_readl(USB_TRANSCEIVER_CTRL);
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l |= CONF_USB2_UNI_R;
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omap_writel(l, USB_TRANSCEIVER_CTRL);
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}
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break;
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default:
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bad:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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2, nwires);
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}
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return syscon1 << 24;
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}
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#ifdef CONFIG_ARCH_OMAP15XX
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/* ULPD_DPLL_CTRL */
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#define DPLL_IOB (1 << 13)
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#define DPLL_PLL_ENABLE (1 << 4)
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#define DPLL_LOCK (1 << 0)
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/* ULPD_APLL_CTRL */
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#define APLL_NDPLL_SWITCH (1 << 0)
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static void __init omap_1510_usb_init(struct omap_usb_config *config)
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{
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unsigned int val;
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u16 w;
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config->usb0_init(config->pins[0], is_usb0_device(config));
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config->usb1_init(config->pins[1]);
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config->usb2_init(config->pins[2], 0);
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val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
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val |= (config->hmc_mode << 1);
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omap_writel(val, MOD_CONF_CTRL_0);
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printk("USB: hmc %d", config->hmc_mode);
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if (config->pins[0])
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printk(", usb0 %d wires%s", config->pins[0],
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is_usb0_device(config) ? " (dev)" : "");
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if (config->pins[1])
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printk(", usb1 %d wires", config->pins[1]);
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if (config->pins[2])
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printk(", usb2 %d wires", config->pins[2]);
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printk("\n");
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/* use DPLL for 48 MHz function clock */
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pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
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omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
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w = omap_readw(ULPD_APLL_CTRL);
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w &= ~APLL_NDPLL_SWITCH;
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omap_writew(w, ULPD_APLL_CTRL);
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w = omap_readw(ULPD_DPLL_CTRL);
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w |= DPLL_IOB | DPLL_PLL_ENABLE;
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omap_writew(w, ULPD_DPLL_CTRL);
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w = omap_readw(ULPD_SOFT_REQ);
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w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
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omap_writew(w, ULPD_SOFT_REQ);
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while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
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cpu_relax();
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#ifdef CONFIG_USB_GADGET_OMAP
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if (config->register_dev) {
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int status;
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udc_device.dev.platform_data = config;
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status = platform_device_register(&udc_device);
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if (status)
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pr_debug("can't register UDC device, %d\n", status);
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/* udc driver gates 48MHz by D+ pullup */
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}
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#endif
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#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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if (config->register_host) {
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int status;
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ohci_device.dev.platform_data = config;
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status = platform_device_register(&ohci_device);
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if (status)
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pr_debug("can't register OHCI device, %d\n", status);
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/* hcd explicitly gates 48MHz */
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}
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#endif
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}
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#else
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static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
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#endif
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void __init omap1_usb_init(struct omap_usb_config *pdata)
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{
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pdata->usb0_init = omap1_usb0_init;
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pdata->usb1_init = omap1_usb1_init;
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pdata->usb2_init = omap1_usb2_init;
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udc_device_init(pdata);
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ohci_device_init(pdata);
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otg_device_init(pdata);
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if (cpu_is_omap7xx() || cpu_is_omap16xx())
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omap_otg_init(pdata);
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else if (cpu_is_omap15xx())
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omap_1510_usb_init(pdata);
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else
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printk(KERN_ERR "USB: No init for your chip yet\n");
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}
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