John Keeping 3fdfb4f170 drm/rockchip: dw-mipi-dsi: properly configure PHY timing ... These values are specified as constant time periods but the PHY configuration is in terms of the current lane byte clock so using constant values guarantees that the timings will be outside the specification with some display configurations. Derive the necessary configuration from the byte clock in order to ensure that the PHY configuration is correct. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-17-john@metanate.com		2017-03-01 14:48:56 -05:00
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drm	drm/rockchip: dw-mipi-dsi: properly configure PHY timing	2017-03-01 14:48:56 -05:00
host1x	gpu: host1x: Set OF node for new host1x devices	2017-01-30 11:47:44 +01:00
ipu-v3	gpu: ipu-v3: Stop overwriting pdev->dev.of_node of child devices	2017-02-17 08:04:27 +01:00
vga	drivers:gpu: vga :vga_switcheroo.c : Fixed some coding style issues	2017-03-01 09:45:28 +01:00
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