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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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41a54482c0
We are about to modify the VGIC to allocate all data structures dynamically and store mapped IRQ information on a per-IRQ struct, which is indeed allocated dynamically at init time. Therefore, we cannot record the mapped IRQ info from the timer at timer reset time like it's done now, because VCPU reset happens before timer init. A possible later time to do this is on the first run of a per VCPU, it just requires us to move the enable state to be a per-VCPU state and do the lookup of the physical IRQ number when we are about to run the VCPU. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
80 lines
2.3 KiB
C
80 lines
2.3 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_KVM_ARCH_TIMER_H
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#define __ASM_ARM_KVM_ARCH_TIMER_H
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#include <linux/clocksource.h>
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#include <linux/hrtimer.h>
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#include <linux/workqueue.h>
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struct arch_timer_kvm {
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/* Virtual offset */
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cycle_t cntvoff;
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};
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struct arch_timer_cpu {
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/* Registers: control register, timer value */
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u32 cntv_ctl; /* Saved/restored */
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cycle_t cntv_cval; /* Saved/restored */
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/*
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* Anything that is not used directly from assembly code goes
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* here.
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*/
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/* Background timer used when the guest is not running */
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struct hrtimer timer;
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/* Work queued with the above timer expires */
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struct work_struct expired;
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/* Background timer active */
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bool armed;
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/* Timer IRQ */
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struct kvm_irq_level irq;
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/* Active IRQ state caching */
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bool active_cleared_last;
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/* Is the timer enabled */
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bool enabled;
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};
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int kvm_timer_hyp_init(void);
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int kvm_timer_enable(struct kvm_vcpu *vcpu);
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void kvm_timer_init(struct kvm *kvm);
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int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
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const struct kvm_irq_level *irq);
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void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu);
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void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu);
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void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu);
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void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu);
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u64 kvm_arm_timer_get_reg(struct kvm_vcpu *, u64 regid);
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int kvm_arm_timer_set_reg(struct kvm_vcpu *, u64 regid, u64 value);
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bool kvm_timer_should_fire(struct kvm_vcpu *vcpu);
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void kvm_timer_schedule(struct kvm_vcpu *vcpu);
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void kvm_timer_unschedule(struct kvm_vcpu *vcpu);
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void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu);
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#endif
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