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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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261ea058f0
There are SoCs like LS1043A where CAAM endianness (BE) does not match
the default endianness of the core (LE).
Moreover, there are requirements for the driver to handle cases like
CPU_BIG_ENDIAN=y on ARM-based SoCs.
This requires for a complete rewrite of the I/O accessors.
PPC-specific accessors - {in,out}_{le,be}XX - are replaced with
generic ones - io{read,write}[be]XX.
Endianness is detected dynamically (at runtime) to allow for
multiplatform kernels, for e.g. running the same kernel image
on LS1043A (BE CAAM) and LS2080A (LE CAAM) armv8-based SoCs.
While here: debugfs entries need to take into consideration the
endianness of the core when displaying data. Add the necessary
glue code so the entries remain the same, but they are properly
read, regardless of the core and/or SEC endianness.
Note: pdb.h fixes only what is currently being used (IPsec).
Reviewed-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
83 lines
2.0 KiB
C
83 lines
2.0 KiB
C
/*
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* CAAM/SEC 4.x functions for using scatterlists in caam driver
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*
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* Copyright 2008-2011 Freescale Semiconductor, Inc.
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*
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*/
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#include "regs.h"
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struct sec4_sg_entry;
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/*
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* convert single dma address to h/w link table format
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*/
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static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr,
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dma_addr_t dma, u32 len, u16 offset)
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{
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sec4_sg_ptr->ptr = cpu_to_caam_dma(dma);
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sec4_sg_ptr->len = cpu_to_caam32(len);
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sec4_sg_ptr->bpid_offset = cpu_to_caam32(offset & SEC4_SG_OFFSET_MASK);
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "sec4_sg_ptr@: ",
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DUMP_PREFIX_ADDRESS, 16, 4, sec4_sg_ptr,
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sizeof(struct sec4_sg_entry), 1);
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#endif
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}
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/*
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* convert scatterlist to h/w link table format
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* but does not have final bit; instead, returns last entry
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*/
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static inline struct sec4_sg_entry *
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sg_to_sec4_sg(struct scatterlist *sg, int sg_count,
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struct sec4_sg_entry *sec4_sg_ptr, u16 offset)
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{
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while (sg_count) {
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dma_to_sec4_sg_one(sec4_sg_ptr, sg_dma_address(sg),
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sg_dma_len(sg), offset);
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sec4_sg_ptr++;
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sg = sg_next(sg);
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sg_count--;
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}
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return sec4_sg_ptr - 1;
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}
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/*
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* convert scatterlist to h/w link table format
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* scatterlist must have been previously dma mapped
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*/
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static inline void sg_to_sec4_sg_last(struct scatterlist *sg, int sg_count,
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struct sec4_sg_entry *sec4_sg_ptr,
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u16 offset)
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{
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sec4_sg_ptr = sg_to_sec4_sg(sg, sg_count, sec4_sg_ptr, offset);
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sec4_sg_ptr->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
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}
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static inline struct sec4_sg_entry *sg_to_sec4_sg_len(
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struct scatterlist *sg, unsigned int total,
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struct sec4_sg_entry *sec4_sg_ptr)
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{
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do {
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unsigned int len = min(sg_dma_len(sg), total);
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dma_to_sec4_sg_one(sec4_sg_ptr, sg_dma_address(sg), len, 0);
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sec4_sg_ptr++;
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sg = sg_next(sg);
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total -= len;
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} while (total);
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return sec4_sg_ptr - 1;
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}
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/* derive number of elements in scatterlist, but return 0 for 1 */
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static inline int sg_count(struct scatterlist *sg_list, int nbytes)
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{
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int sg_nents = sg_nents_for_len(sg_list, nbytes);
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if (likely(sg_nents == 1))
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return 0;
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return sg_nents;
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}
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