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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
115 lines
2.6 KiB
C
115 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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* and Arnd Bergmann, IBM Corp.
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*/
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#undef DEBUG
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/mod_devicetable.h>
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#include <linux/pci.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <linux/atomic.h>
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#include <asm/errno.h>
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#include <asm/topology.h>
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#include <asm/pci-bridge.h>
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#include <asm/ppc-pci.h>
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#include <asm/eeh.h>
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#ifdef CONFIG_PPC_OF_PLATFORM_PCI
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/* The probing of PCI controllers from of_platform is currently
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* 64 bits only, mostly due to gratuitous differences between
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* the 32 and 64 bits PCI code on PowerPC and the 32 bits one
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* lacking some bits needed here.
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*/
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static int of_pci_phb_probe(struct platform_device *dev)
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{
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struct pci_controller *phb;
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/* Check if we can do that ... */
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if (ppc_md.pci_setup_phb == NULL)
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return -ENODEV;
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pr_info("Setting up PCI bus %pOF\n", dev->dev.of_node);
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/* Alloc and setup PHB data structure */
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phb = pcibios_alloc_controller(dev->dev.of_node);
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if (!phb)
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return -ENODEV;
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/* Setup parent in sysfs */
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phb->parent = &dev->dev;
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/* Setup the PHB using arch provided callback */
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if (ppc_md.pci_setup_phb(phb)) {
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pcibios_free_controller(phb);
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return -ENODEV;
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}
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/* Process "ranges" property */
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pci_process_bridge_OF_ranges(phb, dev->dev.of_node, 0);
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/* Init pci_dn data structures */
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pci_devs_phb_init_dynamic(phb);
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/* Create EEH devices for the PHB */
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eeh_dev_phb_init_dynamic(phb);
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/* Register devices with EEH */
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if (dev->dev.of_node->child)
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eeh_add_device_tree_early(PCI_DN(dev->dev.of_node));
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/* Scan the bus */
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pcibios_scan_phb(phb);
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if (phb->bus == NULL)
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return -ENXIO;
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/* Claim resources. This might need some rework as well depending
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* whether we are doing probe-only or not, like assigning unassigned
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* resources etc...
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*/
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pcibios_claim_one_bus(phb->bus);
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/* Finish EEH setup */
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eeh_add_device_tree_late(phb->bus);
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/* Add probed PCI devices to the device model */
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pci_bus_add_devices(phb->bus);
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/* sysfs files should only be added after devices are added */
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eeh_add_sysfs_files(phb->bus);
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return 0;
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}
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static const struct of_device_id of_pci_phb_ids[] = {
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{ .type = "pci", },
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{ .type = "pcix", },
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{ .type = "pcie", },
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{ .type = "pciex", },
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{ .type = "ht", },
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{}
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};
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static struct platform_driver of_pci_phb_driver = {
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.probe = of_pci_phb_probe,
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.driver = {
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.name = "of-pci",
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.of_match_table = of_pci_phb_ids,
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},
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};
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builtin_platform_driver(of_pci_phb_driver);
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#endif /* CONFIG_PPC_OF_PLATFORM_PCI */
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