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Architectures like ppc64 provide persistent memory specific barriers that will ensure that all stores for which the modifications are written to persistent storage by preceding dcbfps and dcbstps instructions have updated persistent storage before any data access or data transfer caused by subsequent instructions is initiated. This is in addition to the ordering done by wmb() Update nvdimm core such that architecture can use barriers other than wmb to ensure all previous writes are architecturally visible for the platform buffer flush. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200701072235.223558-5-aneesh.kumar@linux.ibm.com
272 lines
6.2 KiB
C
272 lines
6.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Generic barrier definitions.
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*
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* It should be possible to use these on really simple architectures,
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* but it serves more as a starting point for new ports.
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*/
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#ifndef __ASM_GENERIC_BARRIER_H
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#define __ASM_GENERIC_BARRIER_H
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#ifndef __ASSEMBLY__
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#include <linux/compiler.h>
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#ifndef nop
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#define nop() asm volatile ("nop")
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#endif
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/*
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* Force strict CPU ordering. And yes, this is required on UP too when we're
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* talking to devices.
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*
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* Fall back to compiler barriers if nothing better is provided.
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*/
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#ifndef mb
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#define mb() barrier()
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#endif
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#ifndef rmb
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#define rmb() mb()
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#endif
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#ifndef wmb
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#define wmb() mb()
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#endif
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#ifndef dma_rmb
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#define dma_rmb() rmb()
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#endif
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#ifndef dma_wmb
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#define dma_wmb() wmb()
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#endif
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#ifndef read_barrier_depends
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#define read_barrier_depends() do { } while (0)
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#endif
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#ifndef __smp_mb
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#define __smp_mb() mb()
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#endif
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#ifndef __smp_rmb
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#define __smp_rmb() rmb()
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#endif
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#ifndef __smp_wmb
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#define __smp_wmb() wmb()
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#endif
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#ifndef __smp_read_barrier_depends
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#define __smp_read_barrier_depends() read_barrier_depends()
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#endif
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#ifdef CONFIG_SMP
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#ifndef smp_mb
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#define smp_mb() __smp_mb()
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#endif
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#ifndef smp_rmb
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#define smp_rmb() __smp_rmb()
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#endif
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#ifndef smp_wmb
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#define smp_wmb() __smp_wmb()
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#endif
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#ifndef smp_read_barrier_depends
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#define smp_read_barrier_depends() __smp_read_barrier_depends()
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#endif
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#else /* !CONFIG_SMP */
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#ifndef smp_mb
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#define smp_mb() barrier()
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#endif
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#ifndef smp_rmb
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#define smp_rmb() barrier()
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#endif
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#ifndef smp_wmb
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#define smp_wmb() barrier()
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#endif
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#ifndef smp_read_barrier_depends
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#define smp_read_barrier_depends() do { } while (0)
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#endif
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#endif /* CONFIG_SMP */
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#ifndef __smp_store_mb
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#define __smp_store_mb(var, value) do { WRITE_ONCE(var, value); __smp_mb(); } while (0)
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#endif
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#ifndef __smp_mb__before_atomic
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#define __smp_mb__before_atomic() __smp_mb()
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#endif
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#ifndef __smp_mb__after_atomic
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#define __smp_mb__after_atomic() __smp_mb()
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#endif
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#ifndef __smp_store_release
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#define __smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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__smp_mb(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#endif
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#ifndef __smp_load_acquire
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#define __smp_load_acquire(p) \
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({ \
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__unqual_scalar_typeof(*p) ___p1 = READ_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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__smp_mb(); \
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(typeof(*p))___p1; \
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})
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#endif
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#ifdef CONFIG_SMP
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#ifndef smp_store_mb
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#define smp_store_mb(var, value) __smp_store_mb(var, value)
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#endif
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#ifndef smp_mb__before_atomic
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#define smp_mb__before_atomic() __smp_mb__before_atomic()
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#endif
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#ifndef smp_mb__after_atomic
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#define smp_mb__after_atomic() __smp_mb__after_atomic()
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#endif
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#ifndef smp_store_release
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#define smp_store_release(p, v) __smp_store_release(p, v)
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#endif
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#ifndef smp_load_acquire
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#define smp_load_acquire(p) __smp_load_acquire(p)
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#endif
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#else /* !CONFIG_SMP */
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#ifndef smp_store_mb
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#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); barrier(); } while (0)
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#endif
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#ifndef smp_mb__before_atomic
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#define smp_mb__before_atomic() barrier()
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#endif
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#ifndef smp_mb__after_atomic
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#define smp_mb__after_atomic() barrier()
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#endif
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#ifndef smp_store_release
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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barrier(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#endif
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#ifndef smp_load_acquire
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#define smp_load_acquire(p) \
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({ \
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__unqual_scalar_typeof(*p) ___p1 = READ_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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barrier(); \
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(typeof(*p))___p1; \
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})
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#endif
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#endif /* CONFIG_SMP */
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/* Barriers for virtual machine guests when talking to an SMP host */
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#define virt_mb() __smp_mb()
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#define virt_rmb() __smp_rmb()
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#define virt_wmb() __smp_wmb()
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#define virt_read_barrier_depends() __smp_read_barrier_depends()
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#define virt_store_mb(var, value) __smp_store_mb(var, value)
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#define virt_mb__before_atomic() __smp_mb__before_atomic()
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#define virt_mb__after_atomic() __smp_mb__after_atomic()
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#define virt_store_release(p, v) __smp_store_release(p, v)
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#define virt_load_acquire(p) __smp_load_acquire(p)
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/**
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* smp_acquire__after_ctrl_dep() - Provide ACQUIRE ordering after a control dependency
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*
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* A control dependency provides a LOAD->STORE order, the additional RMB
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* provides LOAD->LOAD order, together they provide LOAD->{LOAD,STORE} order,
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* aka. (load)-ACQUIRE.
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*
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* Architectures that do not do load speculation can have this be barrier().
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*/
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#ifndef smp_acquire__after_ctrl_dep
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#define smp_acquire__after_ctrl_dep() smp_rmb()
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#endif
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/**
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* smp_cond_load_relaxed() - (Spin) wait for cond with no ordering guarantees
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* @ptr: pointer to the variable to wait on
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* @cond: boolean expression to wait for
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*
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* Equivalent to using READ_ONCE() on the condition variable.
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*
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* Due to C lacking lambda expressions we load the value of *ptr into a
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* pre-named variable @VAL to be used in @cond.
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*/
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#ifndef smp_cond_load_relaxed
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#define smp_cond_load_relaxed(ptr, cond_expr) ({ \
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typeof(ptr) __PTR = (ptr); \
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__unqual_scalar_typeof(*ptr) VAL; \
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for (;;) { \
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VAL = READ_ONCE(*__PTR); \
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if (cond_expr) \
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break; \
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cpu_relax(); \
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} \
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(typeof(*ptr))VAL; \
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})
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#endif
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/**
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* smp_cond_load_acquire() - (Spin) wait for cond with ACQUIRE ordering
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* @ptr: pointer to the variable to wait on
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* @cond: boolean expression to wait for
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*
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* Equivalent to using smp_load_acquire() on the condition variable but employs
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* the control dependency of the wait to reduce the barrier on many platforms.
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*/
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#ifndef smp_cond_load_acquire
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#define smp_cond_load_acquire(ptr, cond_expr) ({ \
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__unqual_scalar_typeof(*ptr) _val; \
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_val = smp_cond_load_relaxed(ptr, cond_expr); \
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smp_acquire__after_ctrl_dep(); \
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(typeof(*ptr))_val; \
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})
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#endif
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/*
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* pmem_wmb() ensures that all stores for which the modification
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* are written to persistent storage by preceding instructions have
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* updated persistent storage before any data access or data transfer
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* caused by subsequent instructions is initiated.
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*/
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#ifndef pmem_wmb
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#define pmem_wmb() wmb()
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#endif
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#endif /* !__ASSEMBLY__ */
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#endif /* __ASM_GENERIC_BARRIER_H */
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