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e0f6dec35f
In checkin:
0c44c2d0f4 x86: Use asm goto to implement better modify_and_test() functions
the various functions which do modify and test were unified and
optimized using "asm goto". However, this change missed the detail
that the bitops require an "Ir" constraint rather than an "er"
constraint ("I" = integer constant from 0-31, "e" = signed 32-bit
integer constant). This would cause code to miscompile if these
functions were used on constant bit positions 32-255 and the build to
fail if used on constant bit positions above 255.
Add the constraints as a parameter to the GEN_BINARY_RMWcc() macro to
avoid this problem.
Reported-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/529E8719.4070202@zytor.com
42 lines
1.0 KiB
C
42 lines
1.0 KiB
C
#ifndef _ASM_X86_RMWcc
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#define _ASM_X86_RMWcc
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#ifdef CC_HAVE_ASM_GOTO
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#define __GEN_RMWcc(fullop, var, cc, ...) \
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do { \
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asm_volatile_goto (fullop "; j" cc " %l[cc_label]" \
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: : "m" (var), ## __VA_ARGS__ \
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: "memory" : cc_label); \
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return 0; \
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cc_label: \
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return 1; \
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} while (0)
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#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
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__GEN_RMWcc(op " " arg0, var, cc)
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#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
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__GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val))
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#else /* !CC_HAVE_ASM_GOTO */
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#define __GEN_RMWcc(fullop, var, cc, ...) \
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do { \
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char c; \
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asm volatile (fullop "; set" cc " %1" \
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: "+m" (var), "=qm" (c) \
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: __VA_ARGS__ : "memory"); \
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return c != 0; \
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} while (0)
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#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
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__GEN_RMWcc(op " " arg0, var, cc)
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#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc) \
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__GEN_RMWcc(op " %2, " arg0, var, cc, vcon (val))
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#endif /* CC_HAVE_ASM_GOTO */
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#endif /* _ASM_X86_RMWcc */
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