mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 01:04:07 +07:00
5f9c01aa7c
Thomas Voegtle reported that doing oldconfig with a .config which has CONFIG_MICROCODE enabled but BLK_DEV_INITRD disabled prevents the microcode loading mechanism from being built. So untangle it from the BLK_DEV_INITRD dependency so that oldconfig doesn't turn it off and add an explanatory text to its Kconfig help what the supported methods for supplying microcode are. Reported-by: Thomas Voegtle <tv@lio96.de> Tested-by: Thomas Voegtle <tv@lio96.de> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> # 4.4 Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1454499225-21544-2-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
173 lines
4.4 KiB
C
173 lines
4.4 KiB
C
#ifndef _ASM_X86_MICROCODE_H
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#define _ASM_X86_MICROCODE_H
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#include <asm/cpu.h>
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#include <linux/earlycpio.h>
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#include <linux/initrd.h>
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#define native_rdmsr(msr, val1, val2) \
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do { \
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u64 __val = native_read_msr((msr)); \
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(void)((val1) = (u32)__val); \
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(void)((val2) = (u32)(__val >> 32)); \
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} while (0)
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#define native_wrmsr(msr, low, high) \
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native_write_msr(msr, low, high)
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#define native_wrmsrl(msr, val) \
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native_write_msr((msr), \
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(u32)((u64)(val)), \
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(u32)((u64)(val) >> 32))
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struct cpu_signature {
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unsigned int sig;
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unsigned int pf;
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unsigned int rev;
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};
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struct device;
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enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
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struct microcode_ops {
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enum ucode_state (*request_microcode_user) (int cpu,
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const void __user *buf, size_t size);
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enum ucode_state (*request_microcode_fw) (int cpu, struct device *,
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bool refresh_fw);
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void (*microcode_fini_cpu) (int cpu);
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/*
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* The generic 'microcode_core' part guarantees that
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* the callbacks below run on a target cpu when they
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* are being called.
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* See also the "Synchronization" section in microcode_core.c.
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*/
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int (*apply_microcode) (int cpu);
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int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
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};
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struct ucode_cpu_info {
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struct cpu_signature cpu_sig;
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int valid;
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void *mc;
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};
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extern struct ucode_cpu_info ucode_cpu_info[];
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#ifdef CONFIG_MICROCODE
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int __init microcode_init(void);
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#else
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static inline int __init microcode_init(void) { return 0; };
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#endif
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#ifdef CONFIG_MICROCODE_INTEL
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extern struct microcode_ops * __init init_intel_microcode(void);
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#else
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static inline struct microcode_ops * __init init_intel_microcode(void)
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{
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return NULL;
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}
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#endif /* CONFIG_MICROCODE_INTEL */
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#ifdef CONFIG_MICROCODE_AMD
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extern struct microcode_ops * __init init_amd_microcode(void);
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extern void __exit exit_amd_microcode(void);
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#else
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static inline struct microcode_ops * __init init_amd_microcode(void)
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{
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return NULL;
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}
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static inline void __exit exit_amd_microcode(void) {}
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#endif
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#define MAX_UCODE_COUNT 128
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#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
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#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
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#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
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#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
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#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
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#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
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#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
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#define CPUID_IS(a, b, c, ebx, ecx, edx) \
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(!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
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/*
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* In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
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* x86_cpuid_vendor() gets vendor id for BSP.
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*
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* In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
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* coding, we still use x86_cpuid_vendor() to get vendor id for AP.
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*
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* x86_cpuid_vendor() gets vendor information directly from CPUID.
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*/
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static inline int x86_cpuid_vendor(void)
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{
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u32 eax = 0x00000000;
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u32 ebx, ecx = 0, edx;
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native_cpuid(&eax, &ebx, &ecx, &edx);
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if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
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return X86_VENDOR_INTEL;
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if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
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return X86_VENDOR_AMD;
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return X86_VENDOR_UNKNOWN;
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}
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static inline unsigned int x86_cpuid_family(void)
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{
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u32 eax = 0x00000001;
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u32 ebx, ecx = 0, edx;
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native_cpuid(&eax, &ebx, &ecx, &edx);
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return x86_family(eax);
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}
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#ifdef CONFIG_MICROCODE
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extern void __init load_ucode_bsp(void);
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extern void load_ucode_ap(void);
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extern int __init save_microcode_in_initrd(void);
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void reload_early_microcode(void);
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extern bool get_builtin_firmware(struct cpio_data *cd, const char *name);
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#else
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static inline void __init load_ucode_bsp(void) { }
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static inline void load_ucode_ap(void) { }
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static inline int __init save_microcode_in_initrd(void) { return 0; }
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static inline void reload_early_microcode(void) { }
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static inline bool
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get_builtin_firmware(struct cpio_data *cd, const char *name) { return false; }
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#endif
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static inline unsigned long get_initrd_start(void)
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{
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#ifdef CONFIG_BLK_DEV_INITRD
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return initrd_start;
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#else
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return 0;
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#endif
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}
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static inline unsigned long get_initrd_start_addr(void)
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{
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#ifdef CONFIG_BLK_DEV_INITRD
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#ifdef CONFIG_X86_32
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unsigned long *initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start);
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return (unsigned long)__pa_nodebug(*initrd_start_p);
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#else
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return get_initrd_start();
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#endif
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#else /* CONFIG_BLK_DEV_INITRD */
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return 0;
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#endif
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}
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#endif /* _ASM_X86_MICROCODE_H */
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