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max-memory-bandwidth can be used to specify the maximum bandwidth dispc can use when reading display data from main memory. In some SoC (am437x for example) we have memory bandwidth limitation which causes underflow in the display subsystem. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
88 lines
2.0 KiB
Plaintext
88 lines
2.0 KiB
Plaintext
Texas Instruments OMAP3 Display Subsystem
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=========================================
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See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
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description about OMAP Display Subsystem bindings.
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DSS Core
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--------
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Required properties:
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- compatible: "ti,omap3-dss"
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- reg: address and length of the register space
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- ti,hwmods: "dss_core"
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- clocks: handle to fclk
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- clock-names: "fck"
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Optional nodes:
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- Video ports:
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- Port 0: DPI output
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- Port 1: SDI output
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DPI Endpoint required properties:
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- data-lines: number of lines used
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SDI Endpoint required properties:
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- datapairs: number of datapairs used
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DISPC
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-----
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Required properties:
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- compatible: "ti,omap3-dispc"
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- reg: address and length of the register space
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- ti,hwmods: "dss_dispc"
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- interrupts: the DISPC interrupt
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- clocks: handle to fclk
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- clock-names: "fck"
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Optional properties:
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- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
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in bytes per second
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RFBI
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----
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Required properties:
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- compatible: "ti,omap3-rfbi"
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- reg: address and length of the register space
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- ti,hwmods: "dss_rfbi"
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- clocks: handles to fclk and iclk
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- clock-names: "fck", "ick"
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VENC
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----
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Required properties:
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- compatible: "ti,omap3-venc"
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- reg: address and length of the register space
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- ti,hwmods: "dss_venc"
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- vdda-supply: power supply for DAC
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- clocks: handle to fclk
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- clock-names: "fck"
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VENC Endpoint required properties:
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- ti,invert-polarity: invert the polarity of the video signal
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- ti,channels: 1 for composite, 2 for s-video
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DSI
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---
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Required properties:
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- compatible: "ti,omap3-dsi"
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- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'
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- reg-names: "proto", "phy", "pll"
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- interrupts: the DSI interrupt line
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- ti,hwmods: "dss_dsi1"
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- vdd-supply: power supply for DSI
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- clocks: handles to fclk and pll clock
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- clock-names: "fck", "sys_clk"
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DSI Endpoint required properties:
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- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
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DATA1+, DATA1-, ...
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