mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 00:36:40 +07:00
1e02ce4ccc
Context switches and TLB flushes can change individual bits of CR4. CR4 reads take several cycles, so store a shadow copy of CR4 in a per-cpu variable. To avoid wasting a cache line, I added the CR4 shadow to cpu_tlbstate, which is already touched in switch_mm. The heaviest users of the cr4 shadow will be switch_mm and __switch_to_xtra, and __switch_to_xtra is called shortly after switch_mm during context switch, so the cacheline is likely to be hot. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Kees Cook <keescook@chromium.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Vince Weaver <vince@deater.net> Cc: "hillf.zj" <hillf.zj@alibaba-inc.com> Cc: Valdis Kletnieks <Valdis.Kletnieks@vt.edu> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/*
|
|
* linux/arch/i386/kernel/head32.c -- prepare to run common code
|
|
*
|
|
* Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
|
|
* Copyright (C) 2007 Eric Biederman <ebiederm@xmission.com>
|
|
*/
|
|
|
|
#include <linux/init.h>
|
|
#include <linux/start_kernel.h>
|
|
#include <linux/mm.h>
|
|
#include <linux/memblock.h>
|
|
|
|
#include <asm/setup.h>
|
|
#include <asm/sections.h>
|
|
#include <asm/e820.h>
|
|
#include <asm/page.h>
|
|
#include <asm/apic.h>
|
|
#include <asm/io_apic.h>
|
|
#include <asm/bios_ebda.h>
|
|
#include <asm/tlbflush.h>
|
|
#include <asm/bootparam_utils.h>
|
|
|
|
static void __init i386_default_early_setup(void)
|
|
{
|
|
/* Initialize 32bit specific setup functions */
|
|
x86_init.resources.reserve_resources = i386_reserve_resources;
|
|
x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc;
|
|
|
|
reserve_ebda_region();
|
|
}
|
|
|
|
asmlinkage __visible void __init i386_start_kernel(void)
|
|
{
|
|
cr4_init_shadow();
|
|
sanitize_boot_params(&boot_params);
|
|
|
|
/* Call the subarch specific early setup function */
|
|
switch (boot_params.hdr.hardware_subarch) {
|
|
case X86_SUBARCH_INTEL_MID:
|
|
x86_intel_mid_early_setup();
|
|
break;
|
|
case X86_SUBARCH_CE4100:
|
|
x86_ce4100_early_setup();
|
|
break;
|
|
default:
|
|
i386_default_early_setup();
|
|
break;
|
|
}
|
|
|
|
start_kernel();
|
|
}
|