mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
c49e99c2b2
Since mvneta driver supports using hardware buffer management (BM), in order to use it, board files have to be adjusted accordingly. This commit enables BM on: * A385-DB-AP - each port has its own pool for long and common pool for short packets, * A388-ClearFog - same as above, * A388-DB - to each port unique 'short' and 'long' pools are mapped, * A388-GP - same as above. Moreover appropriate entry is added to 'soc' node ranges, as well as "okay" status for 'bm' and 'bm-bppi' (internal SRAM) nodes. [gregory.clement@free-electrons.com: add suppport for the ClearFog board] Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
204 lines
4.6 KiB
Plaintext
204 lines
4.6 KiB
Plaintext
/*
|
|
* Device Tree file for Marvell Armada 388 evaluation board
|
|
* (DB-88F6820)
|
|
*
|
|
* Copyright (C) 2014 Marvell
|
|
*
|
|
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
*
|
|
* This file is dual-licensed: you can use it either under the terms
|
|
* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
|
|
* a) This file is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of the
|
|
* License, or (at your option) any later version.
|
|
*
|
|
* This file is distributed in the hope that it will be useful
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* Or, alternatively
|
|
*
|
|
* b) Permission is hereby granted, free of charge, to any person
|
|
* obtaining a copy of this software and associated documentation
|
|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use
|
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
|
* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "armada-388.dtsi"
|
|
|
|
/ {
|
|
model = "Marvell Armada 385 Development Board";
|
|
compatible = "marvell,a385-db", "marvell,armada388",
|
|
"marvell,armada385", "marvell,armada380";
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x10000000>; /* 256 MB */
|
|
};
|
|
|
|
soc {
|
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
|
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
|
|
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
|
|
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
|
|
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
|
|
|
|
internal-regs {
|
|
spi@10600 {
|
|
status = "okay";
|
|
|
|
spi-flash@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "w25q32", "jedec,spi-nor";
|
|
reg = <0>; /* Chip select 0 */
|
|
spi-max-frequency = <108000000>;
|
|
};
|
|
};
|
|
|
|
i2c@11000 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
i2c@11100 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
serial@12000 {
|
|
status = "okay";
|
|
};
|
|
|
|
ethernet@30000 {
|
|
status = "okay";
|
|
phy = <&phy1>;
|
|
phy-mode = "rgmii-id";
|
|
buffer-manager = <&bm>;
|
|
bm,pool-long = <2>;
|
|
bm,pool-short = <3>;
|
|
};
|
|
|
|
usb@58000 {
|
|
status = "ok";
|
|
};
|
|
|
|
ethernet@70000 {
|
|
status = "okay";
|
|
phy = <&phy0>;
|
|
phy-mode = "rgmii-id";
|
|
buffer-manager = <&bm>;
|
|
bm,pool-long = <0>;
|
|
bm,pool-short = <1>;
|
|
};
|
|
|
|
mdio@72004 {
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
|
|
phy1: ethernet-phy@1 {
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
sata@a8000 {
|
|
status = "okay";
|
|
};
|
|
|
|
sata@e0000 {
|
|
status = "okay";
|
|
};
|
|
|
|
bm@c8000 {
|
|
status = "okay";
|
|
};
|
|
|
|
flash@d0000 {
|
|
status = "okay";
|
|
num-cs = <1>;
|
|
marvell,nand-keep-config;
|
|
marvell,nand-enable-arbiter;
|
|
nand-on-flash-bbt;
|
|
nand-ecc-strength = <4>;
|
|
nand-ecc-step-size = <512>;
|
|
|
|
partition@0 {
|
|
label = "U-Boot";
|
|
reg = <0 0x800000>;
|
|
};
|
|
partition@800000 {
|
|
label = "Linux";
|
|
reg = <0x800000 0x800000>;
|
|
};
|
|
partition@1000000 {
|
|
label = "Filesystem";
|
|
reg = <0x1000000 0x3f000000>;
|
|
};
|
|
};
|
|
|
|
sdhci@d8000 {
|
|
broken-cd;
|
|
wp-inverted;
|
|
bus-width = <8>;
|
|
status = "okay";
|
|
no-1-8-v;
|
|
};
|
|
|
|
usb3@f0000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb3@f8000 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
bm-bppi {
|
|
status = "okay";
|
|
};
|
|
|
|
pcie-controller {
|
|
status = "okay";
|
|
/*
|
|
* The two PCIe units are accessible through
|
|
* standard PCIe slots on the board.
|
|
*/
|
|
pcie@1,0 {
|
|
/* Port 0, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
pcie@2,0 {
|
|
/* Port 1, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
};
|