Anson Huang 3637f12faf soc: imx: gpcv2: correct PGC offset ... Correct MIPI/PCIe/USB_HSIC's PGC offset based on design RTL, the values in the Reference Manual (Rev. 1, 01/2018 and the older ones) are incorrect. The correct offset values should be as below: 0x800 ~ 0x83F: PGC for core0 of A7 platform; 0x840 ~ 0x87F: PGC for core1 of A7 platform; 0x880 ~ 0x8BF: PGC for SCU of A7 platform; 0xA00 ~ 0xA3F: PGC for fastmix/megamix; 0xC00 ~ 0xC3F: PGC for MIPI PHY; 0xC40 ~ 0xC7F: PGC for PCIe_PHY; 0xC80 ~ 0xCBF: PGC for USB OTG1 PHY; 0xCC0 ~ 0xCFF: PGC for USB OTG2 PHY; 0xD00 ~ 0xD3F: PGC for USB HSIC PHY; Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Fixes: 03aa12629f ("soc: imx: Add GPCv2 power gating driver") Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2018-06-17 15:37:27 +08:00
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gpc.c	soc: imx: gpc: Do not pass static memory as platform data	2018-04-23 17:03:15 +08:00
gpcv2.c	soc: imx: gpcv2: correct PGC offset	2018-06-17 15:37:27 +08:00
Kconfig	soc: imx: add PM dependency for IMX7_PM_DOMAINS	2017-05-15 09:33:22 +08:00
Makefile	soc: imx: gpc: build gpc only if hardware has gpc	2017-05-15 10:22:25 +08:00