mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 16:46:41 +07:00
9eb0e5f9b2
The DAI mode is and should be configured by the sound card driver as codec and ssi have to be in the right modes to communicate with each other. It is possible to operate the ssi unit or the codec in master mode, sometimes even on the same board in different configurations. With the latest changes in the fsl-ssi driver, the 'fsl,mode' property is only handled as a fallback property. If the sound card sets the DAI mode correctly, this fallback configuration is dropped. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
545 lines
13 KiB
Plaintext
545 lines
13 KiB
Plaintext
/*
|
|
* Copyright (C) 2013 Freescale Semiconductor, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include "imx6sl.dtsi"
|
|
|
|
/ {
|
|
model = "Freescale i.MX6 SoloLite EVK Board";
|
|
compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
|
|
|
|
memory {
|
|
reg = <0x80000000 0x40000000>;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_led>;
|
|
|
|
user {
|
|
label = "debug";
|
|
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
reg_usb_otg1_vbus: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "usb_otg1_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio4 0 0>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_usb_otg2_vbus: regulator@1 {
|
|
compatible = "regulator-fixed";
|
|
reg = <1>;
|
|
regulator-name = "usb_otg2_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio4 2 0>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_aud3v: regulator@2 {
|
|
compatible = "regulator-fixed";
|
|
reg = <2>;
|
|
regulator-name = "wm8962-supply-3v15";
|
|
regulator-min-microvolt = <3150000>;
|
|
regulator-max-microvolt = <3150000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
reg_aud4v: regulator@3 {
|
|
compatible = "regulator-fixed";
|
|
reg = <3>;
|
|
regulator-name = "wm8962-supply-4v2";
|
|
regulator-min-microvolt = <4325000>;
|
|
regulator-max-microvolt = <4325000>;
|
|
regulator-boot-on;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
|
|
model = "wm8962-audio";
|
|
ssi-controller = <&ssi2>;
|
|
audio-codec = <&codec>;
|
|
audio-routing =
|
|
"Headphone Jack", "HPOUTL",
|
|
"Headphone Jack", "HPOUTR",
|
|
"Ext Spk", "SPKOUTL",
|
|
"Ext Spk", "SPKOUTR",
|
|
"AMIC", "MICBIAS",
|
|
"IN3R", "AMIC";
|
|
mux-int-port = <2>;
|
|
mux-ext-port = <3>;
|
|
};
|
|
};
|
|
|
|
&audmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_audmux3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ecspi1 {
|
|
fsl,spi-num-chipselects = <1>;
|
|
cs-gpios = <&gpio4 11 0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
status = "okay";
|
|
|
|
flash: m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "st,m25p32";
|
|
spi-max-frequency = <20000000>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&pinctrl_fec>;
|
|
pinctrl-1 = <&pinctrl_fec_sleep>;
|
|
phy-mode = "rmii";
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
status = "okay";
|
|
|
|
pmic: pfuze100@08 {
|
|
compatible = "fsl,pfuze100";
|
|
reg = <0x08>;
|
|
|
|
regulators {
|
|
sw1a_reg: sw1ab {
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1875000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-ramp-delay = <6250>;
|
|
};
|
|
|
|
sw1c_reg: sw1c {
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1875000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-ramp-delay = <6250>;
|
|
};
|
|
|
|
sw2_reg: sw2 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sw3a_reg: sw3a {
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1975000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sw3b_reg: sw3b {
|
|
regulator-min-microvolt = <400000>;
|
|
regulator-max-microvolt = <1975000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
sw4_reg: sw4 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
swbst_reg: swbst {
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5150000>;
|
|
};
|
|
|
|
snvs_reg: vsnvs {
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vref_reg: vrefddr {
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vgen1_reg: vgen1 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vgen2_reg: vgen2 {
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
};
|
|
|
|
vgen3_reg: vgen3 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
vgen4_reg: vgen4 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vgen5_reg: vgen5 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vgen6_reg: vgen6 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
status = "okay";
|
|
|
|
codec: wm8962@1a {
|
|
compatible = "wlf,wm8962";
|
|
reg = <0x1a>;
|
|
clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
|
|
DCVDD-supply = <&vgen3_reg>;
|
|
DBVDD-supply = <®_aud3v>;
|
|
AVDD-supply = <&vgen3_reg>;
|
|
CPVDD-supply = <&vgen3_reg>;
|
|
MICVDD-supply = <®_aud3v>;
|
|
PLLVDD-supply = <&vgen3_reg>;
|
|
SPKVDD1-supply = <®_aud4v>;
|
|
SPKVDD2-supply = <®_aud4v>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
imx6sl-evk {
|
|
pinctrl_hog: hoggrp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
|
|
MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
|
|
MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
|
|
MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
|
|
MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
|
|
MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
|
|
MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
|
|
MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_audmux3: audmux3grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
|
|
MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
|
|
MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
|
|
MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
|
|
MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
|
|
MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
|
|
MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
|
|
>;
|
|
};
|
|
|
|
pinctrl_fec: fecgrp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
|
|
MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
|
|
MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
|
|
MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
|
|
MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
|
|
MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
|
|
MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
|
|
MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
|
|
MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
|
|
>;
|
|
};
|
|
|
|
pinctrl_fec_sleep: fecgrp-sleep {
|
|
fsl,pins = <
|
|
MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x3080
|
|
MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x3080
|
|
MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x3080
|
|
MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x3080
|
|
MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x3080
|
|
MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x3080
|
|
MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x3080
|
|
MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x3080
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
|
|
MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
|
|
MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_led: ledgrp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_kpp: kppgrp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
|
|
MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
|
|
MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
|
|
MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
|
|
MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
|
|
MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
|
|
MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg1: usbotg1grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
|
|
MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
|
|
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
|
|
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
|
|
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
|
|
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
|
|
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
|
|
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
|
|
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
|
|
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
|
|
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
|
|
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
|
|
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
|
|
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
|
|
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
|
|
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
|
|
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
|
|
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
|
|
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
|
|
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
|
|
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
|
|
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
|
|
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
|
|
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
|
|
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
|
|
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
|
|
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
|
|
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
|
|
MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
|
|
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
|
|
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
|
|
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
|
|
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
|
|
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
|
|
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
|
|
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
|
|
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
|
|
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
|
|
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
|
|
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
|
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
|
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
|
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
|
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
|
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
|
fsl,pins = <
|
|
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
|
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
|
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
|
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
|
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
|
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&kpp {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_kpp>;
|
|
linux,keymap = <
|
|
MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
|
|
MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
|
|
MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
|
|
MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
|
|
MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
|
|
MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
|
|
MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
|
|
MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
|
|
>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg1 {
|
|
vbus-supply = <®_usb_otg1_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg1>;
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg2 {
|
|
vbus-supply = <®_usb_otg2_vbus>;
|
|
dr_mode = "host";
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
|
|
bus-width = <8>;
|
|
cd-gpios = <&gpio4 7 0>;
|
|
wp-gpios = <&gpio4 6 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
|
|
cd-gpios = <&gpio5 0 0>;
|
|
wp-gpios = <&gpio4 29 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
|
cd-gpios = <&gpio3 22 0>;
|
|
status = "okay";
|
|
};
|