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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3c1b8438d4
There is already before a register mask in the regulator driver to allow some bits of a register to be initialized. The register value is defined in the board configuration. This patch puts a mask in the board configuration to specify which bits should actually be altered. The purpose with this patch is to avoid future mistakes when updating the allowed bits in the regulator driver. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
153 lines
3.4 KiB
C
153 lines
3.4 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License Terms: GNU General Public License v2
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*
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* Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
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* Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
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*/
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#ifndef __LINUX_MFD_AB8500_REGULATOR_H
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#define __LINUX_MFD_AB8500_REGULATOR_H
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/* AB8500 regulators */
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enum ab8500_regulator_id {
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AB8500_LDO_AUX1,
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AB8500_LDO_AUX2,
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AB8500_LDO_AUX3,
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AB8500_LDO_INTCORE,
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AB8500_LDO_TVOUT,
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AB8500_LDO_USB,
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AB8500_LDO_AUDIO,
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AB8500_LDO_ANAMIC1,
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AB8500_LDO_ANAMIC2,
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AB8500_LDO_DMIC,
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AB8500_LDO_ANA,
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AB8500_NUM_REGULATORS,
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};
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/* AB9450 regulators */
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enum ab9540_regulator_id {
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AB9540_LDO_AUX1,
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AB9540_LDO_AUX2,
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AB9540_LDO_AUX3,
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AB9540_LDO_AUX4,
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AB9540_LDO_INTCORE,
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AB9540_LDO_TVOUT,
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AB9540_LDO_USB,
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AB9540_LDO_AUDIO,
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AB9540_LDO_ANAMIC1,
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AB9540_LDO_ANAMIC2,
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AB9540_LDO_DMIC,
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AB9540_LDO_ANA,
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AB9540_SYSCLKREQ_2,
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AB9540_SYSCLKREQ_4,
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AB9540_NUM_REGULATORS,
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};
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/* AB8500 and AB9540 register initialization */
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struct ab8500_regulator_reg_init {
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int id;
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u8 mask;
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u8 value;
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};
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#define INIT_REGULATOR_REGISTER(_id, _mask, _value) \
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{ \
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.id = _id, \
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.mask = _mask, \
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.value = _value, \
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}
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/* AB8500 registers */
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enum ab8500_regulator_reg {
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AB8500_REGUREQUESTCTRL2,
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AB8500_REGUREQUESTCTRL3,
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AB8500_REGUREQUESTCTRL4,
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AB8500_REGUSYSCLKREQ1HPVALID1,
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AB8500_REGUSYSCLKREQ1HPVALID2,
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AB8500_REGUHWHPREQ1VALID1,
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AB8500_REGUHWHPREQ1VALID2,
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AB8500_REGUHWHPREQ2VALID1,
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AB8500_REGUHWHPREQ2VALID2,
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AB8500_REGUSWHPREQVALID1,
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AB8500_REGUSWHPREQVALID2,
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AB8500_REGUSYSCLKREQVALID1,
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AB8500_REGUSYSCLKREQVALID2,
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AB8500_REGUMISC1,
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AB8500_VAUDIOSUPPLY,
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AB8500_REGUCTRL1VAMIC,
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AB8500_VPLLVANAREGU,
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AB8500_VREFDDR,
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AB8500_EXTSUPPLYREGU,
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AB8500_VAUX12REGU,
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AB8500_VRF1VAUX3REGU,
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AB8500_VAUX1SEL,
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AB8500_VAUX2SEL,
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AB8500_VRF1VAUX3SEL,
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AB8500_REGUCTRL2SPARE,
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AB8500_REGUCTRLDISCH,
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AB8500_REGUCTRLDISCH2,
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AB8500_ARMREGU2, /* NOTE! PRCMU register */
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AB8500_VBBSEL1, /* NOTE! PRCMU register */
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AB8500_VBBSEL2, /* NOTE! PRCMU register */
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AB8500_VSMPS1REGU,
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AB8500_VSMPS2REGU,
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AB8500_VSMPS3REGU, /* NOTE! PRCMU register */
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AB8500_VSMPS1SEL1,
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AB8500_VSMPS3SEL1, /* NOTE! PRCMU register */
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AB8500_VSMPS3SEL2, /* NOTE! PRCMU register */
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AB8500_NUM_REGULATOR_REGISTERS,
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};
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/* AB9540 registers */
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enum ab9540_regulator_reg {
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AB9540_REGUREQUESTCTRL1,
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AB9540_REGUREQUESTCTRL2,
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AB9540_REGUREQUESTCTRL3,
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AB9540_REGUREQUESTCTRL4,
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AB9540_REGUSYSCLKREQ1HPVALID1,
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AB9540_REGUSYSCLKREQ1HPVALID2,
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AB9540_REGUHWHPREQ1VALID1,
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AB9540_REGUHWHPREQ1VALID2,
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AB9540_REGUHWHPREQ2VALID1,
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AB9540_REGUHWHPREQ2VALID2,
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AB9540_REGUSWHPREQVALID1,
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AB9540_REGUSWHPREQVALID2,
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AB9540_REGUSYSCLKREQVALID1,
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AB9540_REGUSYSCLKREQVALID2,
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AB9540_REGUVAUX4REQVALID,
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AB9540_REGUMISC1,
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AB9540_VAUDIOSUPPLY,
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AB9540_REGUCTRL1VAMIC,
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AB9540_VSMPS1REGU,
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AB9540_VSMPS2REGU,
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AB9540_VSMPS3REGU, /* NOTE! PRCMU register */
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AB9540_VPLLVANAREGU,
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AB9540_EXTSUPPLYREGU,
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AB9540_VAUX12REGU,
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AB9540_VRF1VAUX3REGU,
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AB9540_VSMPS1SEL1,
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AB9540_VSMPS1SEL2,
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AB9540_VSMPS1SEL3,
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AB9540_VSMPS2SEL1,
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AB9540_VSMPS2SEL2,
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AB9540_VSMPS2SEL3,
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AB9540_VSMPS3SEL1, /* NOTE! PRCMU register */
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AB9540_VSMPS3SEL2, /* NOTE! PRCMU register */
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AB9540_VAUX1SEL,
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AB9540_VAUX2SEL,
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AB9540_VRF1VAUX3SEL,
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AB9540_REGUCTRL2SPARE,
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AB9540_VAUX4REQCTRL,
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AB9540_VAUX4REGU,
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AB9540_VAUX4SEL,
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AB9540_REGUCTRLDISCH,
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AB9540_REGUCTRLDISCH2,
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AB9540_REGUCTRLDISCH3,
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AB9540_NUM_REGULATOR_REGISTERS,
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};
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#endif
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