mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 12:30:55 +07:00
25985edced
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include "internals.h"
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void irq_move_masked_irq(struct irq_data *idata)
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{
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struct irq_desc *desc = irq_data_to_desc(idata);
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struct irq_chip *chip = idata->chip;
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if (likely(!irqd_is_setaffinity_pending(&desc->irq_data)))
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return;
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/*
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* Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
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*/
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if (!irqd_can_balance(&desc->irq_data)) {
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WARN_ON(1);
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return;
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}
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irqd_clr_move_pending(&desc->irq_data);
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if (unlikely(cpumask_empty(desc->pending_mask)))
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return;
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if (!chip->irq_set_affinity)
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return;
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assert_raw_spin_locked(&desc->lock);
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/*
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* If there was a valid mask to work with, please
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* do the disable, re-program, enable sequence.
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* This is *not* particularly important for level triggered
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* but in a edge trigger case, we might be setting rte
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* when an active trigger is coming in. This could
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* cause some ioapics to mal-function.
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* Being paranoid i guess!
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*
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* For correct operation this depends on the caller
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* masking the irqs.
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*/
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if (likely(cpumask_any_and(desc->pending_mask, cpu_online_mask)
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< nr_cpu_ids))
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if (!chip->irq_set_affinity(&desc->irq_data,
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desc->pending_mask, false)) {
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cpumask_copy(desc->irq_data.affinity, desc->pending_mask);
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irq_set_thread_affinity(desc);
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}
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cpumask_clear(desc->pending_mask);
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}
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void irq_move_irq(struct irq_data *idata)
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{
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bool masked;
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if (likely(!irqd_is_setaffinity_pending(idata)))
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return;
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if (unlikely(irqd_irq_disabled(idata)))
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return;
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/*
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* Be careful vs. already masked interrupts. If this is a
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* threaded interrupt with ONESHOT set, we can end up with an
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* interrupt storm.
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*/
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masked = irqd_irq_masked(idata);
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if (!masked)
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idata->chip->irq_mask(idata);
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irq_move_masked_irq(idata);
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if (!masked)
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idata->chip->irq_unmask(idata);
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}
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