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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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fb702b942b
This model is based on the on-chip interrupt model used by the TILE-Gx next-generation hardware, and interacts much more cleanly with the Linux generic IRQ layer. The change includes modifications to the Tilera hypervisor, which are reflected in the hypervisor headers in arch/tile/include/arch/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Thomas Gleixner <tglx@linutronix.de>
257 lines
5.7 KiB
C
257 lines
5.7 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* TILE SMP support routines.
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*/
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/cacheflush.h>
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HV_Topology smp_topology __write_once;
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EXPORT_SYMBOL(smp_topology);
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#if CHIP_HAS_IPI()
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static unsigned long __iomem *ipi_mappings[NR_CPUS];
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#endif
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/*
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* Top-level send_IPI*() functions to send messages to other cpus.
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*/
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/* Set by smp_send_stop() to avoid recursive panics. */
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static int stopping_cpus;
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void send_IPI_single(int cpu, int tag)
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{
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HV_Recipient recip = {
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.y = cpu / smp_width,
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.x = cpu % smp_width,
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.state = HV_TO_BE_SENT
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};
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int rc = hv_send_message(&recip, 1, (HV_VirtAddr)&tag, sizeof(tag));
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BUG_ON(rc <= 0);
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}
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void send_IPI_many(const struct cpumask *mask, int tag)
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{
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HV_Recipient recip[NR_CPUS];
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int cpu, sent;
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int nrecip = 0;
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int my_cpu = smp_processor_id();
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for_each_cpu(cpu, mask) {
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HV_Recipient *r;
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BUG_ON(cpu == my_cpu);
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r = &recip[nrecip++];
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r->y = cpu / smp_width;
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r->x = cpu % smp_width;
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r->state = HV_TO_BE_SENT;
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}
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sent = 0;
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while (sent < nrecip) {
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int rc = hv_send_message(recip, nrecip,
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(HV_VirtAddr)&tag, sizeof(tag));
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if (rc <= 0) {
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if (!stopping_cpus) /* avoid recursive panic */
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panic("hv_send_message returned %d", rc);
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break;
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}
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sent += rc;
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}
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}
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void send_IPI_allbutself(int tag)
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{
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struct cpumask mask;
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cpumask_copy(&mask, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), &mask);
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send_IPI_many(&mask, tag);
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}
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/*
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* Provide smp_call_function_mask, but also run function locally
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* if specified in the mask.
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*/
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void on_each_cpu_mask(const struct cpumask *mask, void (*func)(void *),
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void *info, bool wait)
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{
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int cpu = get_cpu();
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smp_call_function_many(mask, func, info, wait);
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if (cpumask_test_cpu(cpu, mask)) {
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local_irq_disable();
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func(info);
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local_irq_enable();
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}
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put_cpu();
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}
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/*
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* Functions related to starting/stopping cpus.
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*/
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/* Handler to start the current cpu. */
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static void smp_start_cpu_interrupt(void)
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{
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get_irq_regs()->pc = start_cpu_function_addr;
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}
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/* Handler to stop the current cpu. */
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static void smp_stop_cpu_interrupt(void)
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{
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set_cpu_online(smp_processor_id(), 0);
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raw_local_irq_disable_all();
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for (;;)
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asm("nap");
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}
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/* This function calls the 'stop' function on all other CPUs in the system. */
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void smp_send_stop(void)
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{
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stopping_cpus = 1;
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send_IPI_allbutself(MSG_TAG_STOP_CPU);
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}
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/*
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* Dispatch code called from hv_message_intr() for HV_MSG_TILE hv messages.
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*/
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void evaluate_message(int tag)
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{
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switch (tag) {
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case MSG_TAG_START_CPU: /* Start up a cpu */
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smp_start_cpu_interrupt();
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break;
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case MSG_TAG_STOP_CPU: /* Sent to shut down slave CPU's */
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smp_stop_cpu_interrupt();
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break;
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case MSG_TAG_CALL_FUNCTION_MANY: /* Call function on cpumask */
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generic_smp_call_function_interrupt();
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break;
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case MSG_TAG_CALL_FUNCTION_SINGLE: /* Call function on one other CPU */
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generic_smp_call_function_single_interrupt();
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break;
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default:
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panic("Unknown IPI message tag %d", tag);
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break;
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}
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}
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/*
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* flush_icache_range() code uses smp_call_function().
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*/
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struct ipi_flush {
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unsigned long start;
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unsigned long end;
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};
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static void ipi_flush_icache_range(void *info)
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{
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struct ipi_flush *flush = (struct ipi_flush *) info;
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__flush_icache_range(flush->start, flush->end);
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}
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void flush_icache_range(unsigned long start, unsigned long end)
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{
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struct ipi_flush flush = { start, end };
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preempt_disable();
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on_each_cpu(ipi_flush_icache_range, &flush, 1);
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preempt_enable();
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}
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/* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */
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static irqreturn_t handle_reschedule_ipi(int irq, void *token)
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{
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/*
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* Nothing to do here; when we return from interrupt, the
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* rescheduling will occur there. But do bump the interrupt
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* profiler count in the meantime.
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*/
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__get_cpu_var(irq_stat).irq_resched_count++;
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return IRQ_HANDLED;
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}
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static struct irqaction resched_action = {
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.handler = handle_reschedule_ipi,
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.name = "resched",
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.dev_id = handle_reschedule_ipi /* unique token */,
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};
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void __init ipi_init(void)
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{
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#if CHIP_HAS_IPI()
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int cpu;
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/* Map IPI trigger MMIO addresses. */
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for_each_possible_cpu(cpu) {
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HV_Coord tile;
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HV_PTE pte;
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unsigned long offset;
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tile.x = cpu_x(cpu);
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tile.y = cpu_y(cpu);
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if (hv_get_ipi_pte(tile, 1, &pte) != 0)
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panic("Failed to initialize IPI for cpu %d\n", cpu);
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offset = hv_pte_get_pfn(pte) << PAGE_SHIFT;
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ipi_mappings[cpu] = ioremap_prot(offset, PAGE_SIZE, pte);
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}
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#endif
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/* Bind handle_reschedule_ipi() to IRQ_RESCHEDULE. */
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tile_irq_activate(IRQ_RESCHEDULE, TILE_IRQ_PERCPU);
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BUG_ON(setup_irq(IRQ_RESCHEDULE, &resched_action));
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}
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#if CHIP_HAS_IPI()
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void smp_send_reschedule(int cpu)
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{
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WARN_ON(cpu_is_offline(cpu));
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/*
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* We just want to do an MMIO store. The traditional writeq()
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* functions aren't really correct here, since they're always
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* directed at the PCI shim. For now, just do a raw store,
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* casting away the __iomem attribute.
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*/
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((unsigned long __force *)ipi_mappings[cpu])[IRQ_RESCHEDULE] = 0;
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}
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#else
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void smp_send_reschedule(int cpu)
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{
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HV_Coord coord;
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WARN_ON(cpu_is_offline(cpu));
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coord.y = cpu_y(cpu);
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coord.x = cpu_x(cpu);
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hv_trigger_ipi(coord, IRQ_RESCHEDULE);
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}
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#endif /* CHIP_HAS_IPI() */
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