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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b59049720d
This allows additional registers to be accessed by the guest in PR-mode KVM without trapping. SPRG4-7 are readable from userspace. On booke, KVM will sync these registers when it enters the guest, so that accesses from guest userspace will work. The guest kernel, OTOH, must consistently use either the real registers or the shared area between exits. This also applies to the already-paravirted SPRG3. On non-booke, it's not clear to what extent SPRG4-7 are supported (they're not architected for book3s, but exist on at least some classic chips). They are copied in the get/set regs ioctls, but I do not see any non-booke emulation. I also do not see any syncing with real registers (in PR-mode) including the user-readable SPRG3. This patch should not make that situation any worse. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
97 lines
2.2 KiB
C
97 lines
2.2 KiB
C
/*
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* Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, <yu.liu@freescale.com>
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*
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* Description:
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* This file is derived from arch/powerpc/include/asm/kvm_44x.h,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_KVM_E500_H__
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#define __ASM_KVM_E500_H__
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#include <linux/kvm_host.h>
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#define BOOKE_INTERRUPT_SIZE 36
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#define E500_PID_NUM 3
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#define E500_TLB_NUM 2
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#define E500_TLB_VALID 1
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#define E500_TLB_DIRTY 2
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struct tlbe_ref {
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pfn_t pfn;
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unsigned int flags; /* E500_TLB_* */
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};
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struct tlbe_priv {
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struct tlbe_ref ref; /* TLB0 only -- TLB1 uses tlb_refs */
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};
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struct vcpu_id_table;
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struct kvmppc_e500_tlb_params {
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int entries, ways, sets;
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};
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struct kvmppc_vcpu_e500 {
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/* Unmodified copy of the guest's TLB -- shared with host userspace. */
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struct kvm_book3e_206_tlb_entry *gtlb_arch;
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/* Starting entry number in gtlb_arch[] */
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int gtlb_offset[E500_TLB_NUM];
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/* KVM internal information associated with each guest TLB entry */
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struct tlbe_priv *gtlb_priv[E500_TLB_NUM];
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struct kvmppc_e500_tlb_params gtlb_params[E500_TLB_NUM];
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unsigned int gtlb_nv[E500_TLB_NUM];
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/*
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* information associated with each host TLB entry --
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* TLB1 only for now. If/when guest TLB1 entries can be
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* mapped with host TLB0, this will be used for that too.
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*
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* We don't want to use this for guest TLB0 because then we'd
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* have the overhead of doing the translation again even if
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* the entry is still in the guest TLB (e.g. we swapped out
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* and back, and our host TLB entries got evicted).
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*/
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struct tlbe_ref *tlb_refs[E500_TLB_NUM];
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unsigned int host_tlb1_nv;
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u32 host_pid[E500_PID_NUM];
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u32 pid[E500_PID_NUM];
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u32 svr;
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/* vcpu id table */
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struct vcpu_id_table *idt;
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u32 l1csr0;
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u32 l1csr1;
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u32 hid0;
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u32 hid1;
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u32 tlb0cfg;
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u32 tlb1cfg;
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u64 mcar;
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struct page **shared_tlb_pages;
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int num_shared_tlb_pages;
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struct kvm_vcpu vcpu;
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};
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static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
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{
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return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu);
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}
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#endif /* __ASM_KVM_E500_H__ */
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