mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 00:06:51 +07:00
961b6e686e
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
310 lines
8.1 KiB
C
310 lines
8.1 KiB
C
/*
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* Copyright 2010 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_ramht.h"
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static u32
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nouveau_ramht_hash_handle(struct nouveau_channel *chan, u32 handle)
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{
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struct drm_device *dev = chan->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_ramht *ramht = chan->ramht;
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u32 hash = 0;
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int i;
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NV_DEBUG(dev, "ch%d handle=0x%08x\n", chan->id, handle);
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for (i = 32; i > 0; i -= ramht->bits) {
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hash ^= (handle & ((1 << ramht->bits) - 1));
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handle >>= ramht->bits;
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}
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if (dev_priv->card_type < NV_50)
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hash ^= chan->id << (ramht->bits - 4);
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hash <<= 3;
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NV_DEBUG(dev, "hash=0x%08x\n", hash);
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return hash;
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}
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static int
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nouveau_ramht_entry_valid(struct drm_device *dev, struct nouveau_gpuobj *ramht,
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u32 offset)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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u32 ctx = nv_ro32(ramht, offset + 4);
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if (dev_priv->card_type < NV_40)
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return ((ctx & NV_RAMHT_CONTEXT_VALID) != 0);
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return (ctx != 0);
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}
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static int
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nouveau_ramht_entry_same_channel(struct nouveau_channel *chan,
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struct nouveau_gpuobj *ramht, u32 offset)
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{
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struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
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u32 ctx = nv_ro32(ramht, offset + 4);
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if (dev_priv->card_type >= NV_50)
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return true;
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else if (dev_priv->card_type >= NV_40)
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return chan->id ==
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((ctx >> NV40_RAMHT_CONTEXT_CHANNEL_SHIFT) & 0x1f);
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else
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return chan->id ==
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((ctx >> NV_RAMHT_CONTEXT_CHANNEL_SHIFT) & 0x1f);
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}
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int
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nouveau_ramht_insert(struct nouveau_channel *chan, u32 handle,
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struct nouveau_gpuobj *gpuobj)
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{
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struct drm_device *dev = chan->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
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struct nouveau_ramht_entry *entry;
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struct nouveau_gpuobj *ramht = chan->ramht->gpuobj;
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unsigned long flags;
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u32 ctx, co, ho;
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if (nouveau_ramht_find(chan, handle))
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return -EEXIST;
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entry = kmalloc(sizeof(*entry), GFP_KERNEL);
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if (!entry)
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return -ENOMEM;
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entry->channel = chan;
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entry->gpuobj = NULL;
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entry->handle = handle;
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nouveau_gpuobj_ref(gpuobj, &entry->gpuobj);
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if (dev_priv->card_type < NV_40) {
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ctx = NV_RAMHT_CONTEXT_VALID | (gpuobj->pinst >> 4) |
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(chan->id << NV_RAMHT_CONTEXT_CHANNEL_SHIFT) |
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(gpuobj->engine << NV_RAMHT_CONTEXT_ENGINE_SHIFT);
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} else
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if (dev_priv->card_type < NV_50) {
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ctx = (gpuobj->pinst >> 4) |
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(chan->id << NV40_RAMHT_CONTEXT_CHANNEL_SHIFT) |
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(gpuobj->engine << NV40_RAMHT_CONTEXT_ENGINE_SHIFT);
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} else {
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if (gpuobj->engine == NVOBJ_ENGINE_DISPLAY) {
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ctx = (gpuobj->cinst << 10) |
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(chan->id << 28) |
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chan->id; /* HASH_TAG */
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} else {
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ctx = (gpuobj->cinst >> 4) |
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((gpuobj->engine <<
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NV40_RAMHT_CONTEXT_ENGINE_SHIFT));
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}
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}
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spin_lock_irqsave(&chan->ramht->lock, flags);
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list_add(&entry->head, &chan->ramht->entries);
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co = ho = nouveau_ramht_hash_handle(chan, handle);
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do {
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if (!nouveau_ramht_entry_valid(dev, ramht, co)) {
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NV_DEBUG(dev,
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"insert ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
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chan->id, co, handle, ctx);
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nv_wo32(ramht, co + 0, handle);
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nv_wo32(ramht, co + 4, ctx);
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spin_unlock_irqrestore(&chan->ramht->lock, flags);
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instmem->flush(dev);
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return 0;
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}
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NV_DEBUG(dev, "collision ch%d 0x%08x: h=0x%08x\n",
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chan->id, co, nv_ro32(ramht, co));
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co += 8;
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if (co >= ramht->size)
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co = 0;
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} while (co != ho);
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NV_ERROR(dev, "RAMHT space exhausted. ch=%d\n", chan->id);
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list_del(&entry->head);
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spin_unlock_irqrestore(&chan->ramht->lock, flags);
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kfree(entry);
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return -ENOMEM;
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}
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static struct nouveau_ramht_entry *
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nouveau_ramht_remove_entry(struct nouveau_channel *chan, u32 handle)
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{
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struct nouveau_ramht *ramht = chan ? chan->ramht : NULL;
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struct nouveau_ramht_entry *entry;
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unsigned long flags;
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if (!ramht)
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return NULL;
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spin_lock_irqsave(&ramht->lock, flags);
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list_for_each_entry(entry, &ramht->entries, head) {
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if (entry->channel == chan &&
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(!handle || entry->handle == handle)) {
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list_del(&entry->head);
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spin_unlock_irqrestore(&ramht->lock, flags);
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return entry;
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}
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}
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spin_unlock_irqrestore(&ramht->lock, flags);
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return NULL;
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}
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static void
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nouveau_ramht_remove_hash(struct nouveau_channel *chan, u32 handle)
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{
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struct drm_device *dev = chan->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
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struct nouveau_gpuobj *ramht = chan->ramht->gpuobj;
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unsigned long flags;
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u32 co, ho;
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spin_lock_irqsave(&chan->ramht->lock, flags);
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co = ho = nouveau_ramht_hash_handle(chan, handle);
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do {
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if (nouveau_ramht_entry_valid(dev, ramht, co) &&
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nouveau_ramht_entry_same_channel(chan, ramht, co) &&
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(handle == nv_ro32(ramht, co))) {
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NV_DEBUG(dev,
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"remove ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
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chan->id, co, handle, nv_ro32(ramht, co + 4));
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nv_wo32(ramht, co + 0, 0x00000000);
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nv_wo32(ramht, co + 4, 0x00000000);
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instmem->flush(dev);
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goto out;
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}
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co += 8;
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if (co >= ramht->size)
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co = 0;
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} while (co != ho);
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NV_ERROR(dev, "RAMHT entry not found. ch=%d, handle=0x%08x\n",
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chan->id, handle);
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out:
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spin_unlock_irqrestore(&chan->ramht->lock, flags);
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}
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int
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nouveau_ramht_remove(struct nouveau_channel *chan, u32 handle)
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{
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struct nouveau_ramht_entry *entry;
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entry = nouveau_ramht_remove_entry(chan, handle);
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if (!entry)
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return -ENOENT;
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nouveau_ramht_remove_hash(chan, entry->handle);
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nouveau_gpuobj_ref(NULL, &entry->gpuobj);
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kfree(entry);
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return 0;
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}
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struct nouveau_gpuobj *
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nouveau_ramht_find(struct nouveau_channel *chan, u32 handle)
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{
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struct nouveau_ramht *ramht = chan->ramht;
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struct nouveau_ramht_entry *entry;
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struct nouveau_gpuobj *gpuobj = NULL;
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unsigned long flags;
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if (unlikely(!chan->ramht))
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return NULL;
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spin_lock_irqsave(&ramht->lock, flags);
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list_for_each_entry(entry, &chan->ramht->entries, head) {
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if (entry->channel == chan && entry->handle == handle) {
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gpuobj = entry->gpuobj;
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break;
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}
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}
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spin_unlock_irqrestore(&ramht->lock, flags);
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return gpuobj;
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}
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int
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nouveau_ramht_new(struct drm_device *dev, struct nouveau_gpuobj *gpuobj,
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struct nouveau_ramht **pramht)
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{
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struct nouveau_ramht *ramht;
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ramht = kzalloc(sizeof(*ramht), GFP_KERNEL);
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if (!ramht)
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return -ENOMEM;
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ramht->dev = dev;
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kref_init(&ramht->refcount);
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ramht->bits = drm_order(gpuobj->size / 8);
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INIT_LIST_HEAD(&ramht->entries);
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spin_lock_init(&ramht->lock);
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nouveau_gpuobj_ref(gpuobj, &ramht->gpuobj);
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*pramht = ramht;
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return 0;
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}
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static void
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nouveau_ramht_del(struct kref *ref)
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{
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struct nouveau_ramht *ramht =
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container_of(ref, struct nouveau_ramht, refcount);
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nouveau_gpuobj_ref(NULL, &ramht->gpuobj);
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kfree(ramht);
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}
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void
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nouveau_ramht_ref(struct nouveau_ramht *ref, struct nouveau_ramht **ptr,
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struct nouveau_channel *chan)
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{
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struct nouveau_ramht_entry *entry;
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struct nouveau_ramht *ramht;
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if (ref)
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kref_get(&ref->refcount);
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ramht = *ptr;
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if (ramht) {
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while ((entry = nouveau_ramht_remove_entry(chan, 0))) {
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nouveau_ramht_remove_hash(chan, entry->handle);
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nouveau_gpuobj_ref(NULL, &entry->gpuobj);
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kfree(entry);
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}
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kref_put(&ramht->refcount, nouveau_ramht_del);
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}
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*ptr = ref;
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}
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