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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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53b3d9c3fd
Setting PA_PWRMode using DME_SET triggers the power mode change. And then the result will be given by the HCS.UPMCRS. This operation should be done atomically. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org> Tested-by: Yaniv Gardi <ygardi@codeaurora.org> Signed-off-by: Santosh Y <santoshsy@gmail.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
321 lines
9.2 KiB
C
321 lines
9.2 KiB
C
/*
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* Universal Flash Storage Host controller driver
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*
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* This code is based on drivers/scsi/ufs/ufshcd.h
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* Copyright (C) 2011-2013 Samsung India Software Operations
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*
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* Authors:
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* Santosh Yaraganavi <santosh.sy@samsung.com>
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* Vinayak Holikatti <h.vinayak@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* See the COPYING file in the top-level directory or visit
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* <http://www.gnu.org/licenses/gpl-2.0.html>
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* This program is provided "AS IS" and "WITH ALL FAULTS" and
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* without warranty of any kind. You are solely responsible for
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* determining the appropriateness of using and distributing
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* the program and assume all risks associated with your exercise
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* of rights with respect to the program, including but not limited
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* to infringement of third party rights, the risks and costs of
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* program errors, damage to or loss of data, programs or equipment,
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* and unavailability or interruption of operations. Under no
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* circumstances will the contributor of this Program be liable for
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* any damages of any kind arising from your use or distribution of
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* this program.
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*/
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#ifndef _UFSHCD_H
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#define _UFSHCD_H
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/bitops.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <asm/irq.h>
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#include <asm/byteorder.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_tcq.h>
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#include <scsi/scsi_dbg.h>
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#include <scsi/scsi_eh.h>
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#include "ufs.h"
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#include "ufshci.h"
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#define UFSHCD "ufshcd"
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#define UFSHCD_DRIVER_VERSION "0.2"
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enum dev_cmd_type {
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DEV_CMD_TYPE_NOP = 0x0,
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DEV_CMD_TYPE_QUERY = 0x1,
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};
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/**
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* struct uic_command - UIC command structure
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* @command: UIC command
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* @argument1: UIC command argument 1
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* @argument2: UIC command argument 2
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* @argument3: UIC command argument 3
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* @cmd_active: Indicate if UIC command is outstanding
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* @result: UIC command result
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* @done: UIC command completion
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*/
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struct uic_command {
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u32 command;
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u32 argument1;
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u32 argument2;
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u32 argument3;
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int cmd_active;
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int result;
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struct completion done;
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};
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/**
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* struct ufshcd_lrb - local reference block
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* @utr_descriptor_ptr: UTRD address of the command
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* @ucd_req_ptr: UCD address of the command
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* @ucd_rsp_ptr: Response UPIU address for this command
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* @ucd_prdt_ptr: PRDT address of the command
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* @cmd: pointer to SCSI command
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* @sense_buffer: pointer to sense buffer address of the SCSI command
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* @sense_bufflen: Length of the sense buffer
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* @scsi_status: SCSI status of the command
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* @command_type: SCSI, UFS, Query.
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* @task_tag: Task tag of the command
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* @lun: LUN of the command
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* @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
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*/
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struct ufshcd_lrb {
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struct utp_transfer_req_desc *utr_descriptor_ptr;
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struct utp_upiu_req *ucd_req_ptr;
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struct utp_upiu_rsp *ucd_rsp_ptr;
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struct ufshcd_sg_entry *ucd_prdt_ptr;
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struct scsi_cmnd *cmd;
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u8 *sense_buffer;
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unsigned int sense_bufflen;
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int scsi_status;
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int command_type;
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int task_tag;
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unsigned int lun;
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bool intr_cmd;
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};
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/**
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* struct ufs_query - holds relevent data structures for query request
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* @request: request upiu and function
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* @descriptor: buffer for sending/receiving descriptor
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* @response: response upiu and response
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*/
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struct ufs_query {
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struct ufs_query_req request;
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u8 *descriptor;
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struct ufs_query_res response;
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};
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/**
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* struct ufs_dev_cmd - all assosiated fields with device management commands
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* @type: device management command type - Query, NOP OUT
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* @lock: lock to allow one command at a time
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* @complete: internal commands completion
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* @tag_wq: wait queue until free command slot is available
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*/
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struct ufs_dev_cmd {
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enum dev_cmd_type type;
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struct mutex lock;
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struct completion *complete;
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wait_queue_head_t tag_wq;
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struct ufs_query query;
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};
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/**
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* struct ufs_hba - per adapter private structure
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* @mmio_base: UFSHCI base register address
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* @ucdl_base_addr: UFS Command Descriptor base address
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* @utrdl_base_addr: UTP Transfer Request Descriptor base address
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* @utmrdl_base_addr: UTP Task Management Descriptor base address
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* @ucdl_dma_addr: UFS Command Descriptor DMA address
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* @utrdl_dma_addr: UTRDL DMA address
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* @utmrdl_dma_addr: UTMRDL DMA address
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* @host: Scsi_Host instance of the driver
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* @dev: device handle
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* @lrb: local reference block
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* @lrb_in_use: lrb in use
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* @outstanding_tasks: Bits representing outstanding task requests
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* @outstanding_reqs: Bits representing outstanding transfer requests
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* @capabilities: UFS Controller Capabilities
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* @nutrs: Transfer Request Queue depth supported by controller
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* @nutmrs: Task Management Queue depth supported by controller
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* @ufs_version: UFS Version to which controller complies
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* @irq: Irq number of the controller
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* @active_uic_cmd: handle of active UIC command
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* @uic_cmd_mutex: mutex for uic command
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* @ufshcd_tm_wait_queue: wait queue for task management
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* @pwr_done: completion for power mode change
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* @tm_condition: condition variable for task management
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* @ufshcd_state: UFSHCD states
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* @intr_mask: Interrupt Mask Bits
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* @ee_ctrl_mask: Exception event control mask
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* @feh_workq: Work queue for fatal controller error handling
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* @eeh_work: Worker to handle exception events
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* @errors: HBA errors
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* @dev_cmd: ufs device management command information
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* @auto_bkops_enabled: to track whether bkops is enabled in device
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*/
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struct ufs_hba {
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void __iomem *mmio_base;
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/* Virtual memory reference */
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struct utp_transfer_cmd_desc *ucdl_base_addr;
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struct utp_transfer_req_desc *utrdl_base_addr;
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struct utp_task_req_desc *utmrdl_base_addr;
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/* DMA memory reference */
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dma_addr_t ucdl_dma_addr;
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dma_addr_t utrdl_dma_addr;
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dma_addr_t utmrdl_dma_addr;
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struct Scsi_Host *host;
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struct device *dev;
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struct ufshcd_lrb *lrb;
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unsigned long lrb_in_use;
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unsigned long outstanding_tasks;
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unsigned long outstanding_reqs;
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u32 capabilities;
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int nutrs;
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int nutmrs;
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u32 ufs_version;
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unsigned int irq;
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struct uic_command *active_uic_cmd;
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struct mutex uic_cmd_mutex;
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wait_queue_head_t ufshcd_tm_wait_queue;
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unsigned long tm_condition;
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struct completion *pwr_done;
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u32 ufshcd_state;
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u32 intr_mask;
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u16 ee_ctrl_mask;
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/* Work Queues */
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struct work_struct feh_workq;
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struct work_struct eeh_work;
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/* HBA Errors */
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u32 errors;
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/* Device management request data */
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struct ufs_dev_cmd dev_cmd;
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bool auto_bkops_enabled;
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};
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#define ufshcd_writel(hba, val, reg) \
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writel((val), (hba)->mmio_base + (reg))
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#define ufshcd_readl(hba, reg) \
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readl((hba)->mmio_base + (reg))
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int ufshcd_init(struct device *, struct ufs_hba ** , void __iomem * ,
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unsigned int);
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void ufshcd_remove(struct ufs_hba *);
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/**
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* ufshcd_hba_stop - Send controller to reset state
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* @hba: per adapter instance
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*/
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static inline void ufshcd_hba_stop(struct ufs_hba *hba)
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{
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ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
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}
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static inline void check_upiu_size(void)
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{
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BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
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GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
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}
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extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
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extern int ufshcd_runtime_resume(struct ufs_hba *hba);
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extern int ufshcd_runtime_idle(struct ufs_hba *hba);
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extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
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u8 attr_set, u32 mib_val, u8 peer);
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extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
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u32 *mib_val, u8 peer);
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/* UIC command interfaces for DME primitives */
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#define DME_LOCAL 0
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#define DME_PEER 1
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#define ATTR_SET_NOR 0 /* NORMAL */
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#define ATTR_SET_ST 1 /* STATIC */
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static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
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u32 mib_val)
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{
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return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
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mib_val, DME_LOCAL);
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}
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static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
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u32 mib_val)
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{
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return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
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mib_val, DME_LOCAL);
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}
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static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
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u32 mib_val)
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{
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return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
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mib_val, DME_PEER);
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}
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static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
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u32 mib_val)
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{
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return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
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mib_val, DME_PEER);
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}
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static inline int ufshcd_dme_get(struct ufs_hba *hba,
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u32 attr_sel, u32 *mib_val)
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{
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return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
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}
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static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
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u32 attr_sel, u32 *mib_val)
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{
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return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
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}
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#endif /* End of Header */
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