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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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36ddf31b68
This adds a relatively simplistic clock framework for sh. The initial goal behind this is to clean up the arch/sh/kernel/time.c mess and to get the CPU subtype-specific frequency setting and calculation code moved somewhere more sensible. This only deals with the core clocks at the moment, though it's trivial for other drivers to define their own clocks as desired. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
81 lines
1.9 KiB
C
81 lines
1.9 KiB
C
/*
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* arch/sh/kernel/cpu/sh4/clock-sh4.c
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*
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* Generic SH-4 support for the clock framework
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*
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* Copyright (C) 2005 Paul Mundt
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*
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* FRQCR parsing hacked out of arch/sh/kernel/time.c
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*
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* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
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* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
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* Copyright (C) 2002, 2003, 2004 Paul Mundt
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* Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <asm/clock.h>
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#include <asm/freq.h>
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#include <asm/io.h>
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static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
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#define bfc_divisors ifc_divisors /* Same */
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static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
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static void master_clk_init(struct clk *clk)
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{
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clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007];
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}
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static struct clk_ops sh4_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FRQCR) & 0x0007);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh4_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007;
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clk->rate = clk->parent->rate / bfc_divisors[idx];
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}
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static struct clk_ops sh4_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007;
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clk->rate = clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh4_cpu_clk_ops = {
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.recalc = cpu_clk_recalc,
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};
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static struct clk_ops *sh4_clk_ops[] = {
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&sh4_master_clk_ops,
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&sh4_module_clk_ops,
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&sh4_bus_clk_ops,
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&sh4_cpu_clk_ops,
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};
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void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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{
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if (idx < ARRAY_SIZE(sh4_clk_ops))
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*ops = sh4_clk_ops[idx];
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}
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