mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
543852af8e
SARADC controller needs to be reset before programming it, otherwise it will not function properly. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-iio@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Tested-by: Guenter Roeck <linux@roeck-us.net> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
36 lines
1.3 KiB
Plaintext
36 lines
1.3 KiB
Plaintext
Rockchip Successive Approximation Register (SAR) A/D Converter bindings
|
|
|
|
Required properties:
|
|
- compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc"
|
|
- "rockchip,saradc": for rk3188, rk3288
|
|
- "rockchip,rk3066-tsadc": for rk3036
|
|
- "rockchip,rk3399-saradc": for rk3399
|
|
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
region.
|
|
- interrupts: The interrupt number to the cpu. The interrupt specifier format
|
|
depends on the interrupt controller.
|
|
- clocks: Must contain an entry for each entry in clock-names.
|
|
- clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
|
|
the peripheral clock.
|
|
- vref-supply: The regulator supply ADC reference voltage.
|
|
- #io-channel-cells: Should be 1, see ../iio-bindings.txt
|
|
|
|
Optional properties:
|
|
- resets: Must contain an entry for each entry in reset-names if need support
|
|
this option. See ../reset/reset.txt for details.
|
|
- reset-names: Must include the name "saradc-apb".
|
|
|
|
Example:
|
|
saradc: saradc@2006c000 {
|
|
compatible = "rockchip,saradc";
|
|
reg = <0x2006c000 0x100>;
|
|
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
|
|
clock-names = "saradc", "apb_pclk";
|
|
resets = <&cru SRST_SARADC>;
|
|
reset-names = "saradc-apb";
|
|
#io-channel-cells = <1>;
|
|
vref-supply = <&vcc18>;
|
|
};
|