Len Brown 3a9a941d0b tools/power turbostat: decode MSR_*_PERF_LIMIT_REASONS ... The Processor generation code-named Haswell added MSR_{CORE | GFX | RING}_PERF_LIMIT_REASONS to explain when and how the processor limits frequency. turbostat -v will now decode these bits. Each MSR has an "Active" set of bits which describe current conditions, and a "Logged" set of bits, which describe what has happened since last cleared. Turbostat currently doesn't clear the log bits. Signed-off-by: Len Brown <len.brown@intel.com>		2015-02-09 16:44:24 -05:00
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asm	x86, tls: Interpret an all-zero struct user_desc as "no segment"	2015-01-22 21:45:07 +01:00
uapi/asm	tools/power turbostat: decode MSR_*_PERF_LIMIT_REASONS	2015-02-09 16:44:24 -05:00