mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 17:22:01 +07:00
3a891a6267
We want to use intel_engine_mask_t inside i915_request.h, which means extracting it from the general header file mess and placing it inside a types.h. A knock on effect is that the compiler wants to warn about type-contraction of ALL_ENGINES into intel_engine_maskt_t, so prepare for the worst. v2: Use intel_engine_mask_t consistently v3: Move I915_NUM_ENGINES to its natural home at the end of the enum Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190401162641.10963-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
129 lines
4.1 KiB
C
129 lines
4.1 KiB
C
/*
|
|
* Copyright © 2016 Intel Corporation
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice (including the next
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
|
* Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
* IN THE SOFTWARE.
|
|
*
|
|
*/
|
|
|
|
#ifndef I915_TIMELINE_H
|
|
#define I915_TIMELINE_H
|
|
|
|
#include <linux/lockdep.h>
|
|
|
|
#include "i915_active.h"
|
|
#include "i915_syncmap.h"
|
|
#include "i915_timeline_types.h"
|
|
|
|
int i915_timeline_init(struct drm_i915_private *i915,
|
|
struct i915_timeline *tl,
|
|
struct i915_vma *hwsp);
|
|
void i915_timeline_fini(struct i915_timeline *tl);
|
|
|
|
static inline void
|
|
i915_timeline_set_subclass(struct i915_timeline *timeline,
|
|
unsigned int subclass)
|
|
{
|
|
lockdep_set_subclass(&timeline->lock, subclass);
|
|
|
|
/*
|
|
* Due to an interesting quirk in lockdep's internal debug tracking,
|
|
* after setting a subclass we must ensure the lock is used. Otherwise,
|
|
* nr_unused_locks is incremented once too often.
|
|
*/
|
|
#ifdef CONFIG_DEBUG_LOCK_ALLOC
|
|
local_irq_disable();
|
|
lock_map_acquire(&timeline->lock.dep_map);
|
|
lock_map_release(&timeline->lock.dep_map);
|
|
local_irq_enable();
|
|
#endif
|
|
}
|
|
|
|
struct i915_timeline *
|
|
i915_timeline_create(struct drm_i915_private *i915,
|
|
struct i915_vma *global_hwsp);
|
|
|
|
static inline struct i915_timeline *
|
|
i915_timeline_get(struct i915_timeline *timeline)
|
|
{
|
|
kref_get(&timeline->kref);
|
|
return timeline;
|
|
}
|
|
|
|
void __i915_timeline_free(struct kref *kref);
|
|
static inline void i915_timeline_put(struct i915_timeline *timeline)
|
|
{
|
|
kref_put(&timeline->kref, __i915_timeline_free);
|
|
}
|
|
|
|
static inline int __i915_timeline_sync_set(struct i915_timeline *tl,
|
|
u64 context, u32 seqno)
|
|
{
|
|
return i915_syncmap_set(&tl->sync, context, seqno);
|
|
}
|
|
|
|
static inline int i915_timeline_sync_set(struct i915_timeline *tl,
|
|
const struct dma_fence *fence)
|
|
{
|
|
return __i915_timeline_sync_set(tl, fence->context, fence->seqno);
|
|
}
|
|
|
|
static inline bool __i915_timeline_sync_is_later(struct i915_timeline *tl,
|
|
u64 context, u32 seqno)
|
|
{
|
|
return i915_syncmap_is_later(&tl->sync, context, seqno);
|
|
}
|
|
|
|
static inline bool i915_timeline_sync_is_later(struct i915_timeline *tl,
|
|
const struct dma_fence *fence)
|
|
{
|
|
return __i915_timeline_sync_is_later(tl, fence->context, fence->seqno);
|
|
}
|
|
|
|
int i915_timeline_pin(struct i915_timeline *tl);
|
|
int i915_timeline_get_seqno(struct i915_timeline *tl,
|
|
struct i915_request *rq,
|
|
u32 *seqno);
|
|
void i915_timeline_unpin(struct i915_timeline *tl);
|
|
|
|
int i915_timeline_read_hwsp(struct i915_request *from,
|
|
struct i915_request *until,
|
|
u32 *hwsp_offset);
|
|
|
|
void i915_timelines_init(struct drm_i915_private *i915);
|
|
void i915_timelines_park(struct drm_i915_private *i915);
|
|
void i915_timelines_fini(struct drm_i915_private *i915);
|
|
|
|
/**
|
|
* i915_timeline_set_barrier - orders submission between different timelines
|
|
* @timeline: timeline to set the barrier on
|
|
* @rq: request after which new submissions can proceed
|
|
*
|
|
* Sets the passed in request as the serialization point for all subsequent
|
|
* submissions on @timeline. Subsequent requests will not be submitted to GPU
|
|
* until the barrier has been completed.
|
|
*/
|
|
static inline int
|
|
i915_timeline_set_barrier(struct i915_timeline *tl, struct i915_request *rq)
|
|
{
|
|
return i915_active_request_set(&tl->barrier, rq);
|
|
}
|
|
|
|
#endif
|