mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 22:05:23 +07:00
52c956003a
Knowing whether we need to delay the MAC configuration because a module may have a PHY is useful to phylink to allow NBASE-T modules to work on systems supporting no more than 2.5G speeds. This commit allows us to delay such configuration until after the PHY has been probed by recording the parsed capabilities, and if the module may have a PHY, doing no more until the module_start() notification is called. At that point, we either have a PHY, or we don't. We move the PHY-based setup a little later, and use the PHYs support capabilities rather than the EEPROM parsed capabilities to determine whether we can support the PHY. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
619 lines
16 KiB
C
619 lines
16 KiB
C
#ifndef LINUX_SFP_H
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#define LINUX_SFP_H
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#include <linux/phy.h>
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struct sfp_eeprom_base {
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u8 phys_id;
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u8 phys_ext_id;
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u8 connector;
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#if defined __BIG_ENDIAN_BITFIELD
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u8 e10g_base_er:1;
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u8 e10g_base_lrm:1;
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u8 e10g_base_lr:1;
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u8 e10g_base_sr:1;
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u8 if_1x_sx:1;
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u8 if_1x_lx:1;
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u8 if_1x_copper_active:1;
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u8 if_1x_copper_passive:1;
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u8 escon_mmf_1310_led:1;
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u8 escon_smf_1310_laser:1;
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u8 sonet_oc192_short_reach:1;
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u8 sonet_reach_bit1:1;
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u8 sonet_reach_bit2:1;
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u8 sonet_oc48_long_reach:1;
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u8 sonet_oc48_intermediate_reach:1;
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u8 sonet_oc48_short_reach:1;
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u8 unallocated_5_7:1;
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u8 sonet_oc12_smf_long_reach:1;
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u8 sonet_oc12_smf_intermediate_reach:1;
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u8 sonet_oc12_short_reach:1;
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u8 unallocated_5_3:1;
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u8 sonet_oc3_smf_long_reach:1;
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u8 sonet_oc3_smf_intermediate_reach:1;
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u8 sonet_oc3_short_reach:1;
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u8 e_base_px:1;
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u8 e_base_bx10:1;
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u8 e100_base_fx:1;
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u8 e100_base_lx:1;
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u8 e1000_base_t:1;
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u8 e1000_base_cx:1;
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u8 e1000_base_lx:1;
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u8 e1000_base_sx:1;
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u8 fc_ll_v:1;
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u8 fc_ll_s:1;
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u8 fc_ll_i:1;
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u8 fc_ll_l:1;
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u8 fc_ll_m:1;
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u8 fc_tech_sa:1;
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u8 fc_tech_lc:1;
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u8 fc_tech_electrical_inter_enclosure:1;
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u8 fc_tech_electrical_intra_enclosure:1;
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u8 fc_tech_sn:1;
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u8 fc_tech_sl:1;
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u8 fc_tech_ll:1;
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u8 sfp_ct_active:1;
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u8 sfp_ct_passive:1;
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u8 unallocated_8_1:1;
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u8 unallocated_8_0:1;
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u8 fc_media_tw:1;
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u8 fc_media_tp:1;
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u8 fc_media_mi:1;
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u8 fc_media_tv:1;
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u8 fc_media_m6:1;
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u8 fc_media_m5:1;
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u8 unallocated_9_1:1;
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u8 fc_media_sm:1;
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u8 fc_speed_1200:1;
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u8 fc_speed_800:1;
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u8 fc_speed_1600:1;
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u8 fc_speed_400:1;
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u8 fc_speed_3200:1;
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u8 fc_speed_200:1;
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u8 unallocated_10_1:1;
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u8 fc_speed_100:1;
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#elif defined __LITTLE_ENDIAN_BITFIELD
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u8 if_1x_copper_passive:1;
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u8 if_1x_copper_active:1;
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u8 if_1x_lx:1;
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u8 if_1x_sx:1;
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u8 e10g_base_sr:1;
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u8 e10g_base_lr:1;
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u8 e10g_base_lrm:1;
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u8 e10g_base_er:1;
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u8 sonet_oc3_short_reach:1;
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u8 sonet_oc3_smf_intermediate_reach:1;
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u8 sonet_oc3_smf_long_reach:1;
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u8 unallocated_5_3:1;
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u8 sonet_oc12_short_reach:1;
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u8 sonet_oc12_smf_intermediate_reach:1;
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u8 sonet_oc12_smf_long_reach:1;
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u8 unallocated_5_7:1;
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u8 sonet_oc48_short_reach:1;
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u8 sonet_oc48_intermediate_reach:1;
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u8 sonet_oc48_long_reach:1;
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u8 sonet_reach_bit2:1;
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u8 sonet_reach_bit1:1;
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u8 sonet_oc192_short_reach:1;
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u8 escon_smf_1310_laser:1;
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u8 escon_mmf_1310_led:1;
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u8 e1000_base_sx:1;
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u8 e1000_base_lx:1;
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u8 e1000_base_cx:1;
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u8 e1000_base_t:1;
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u8 e100_base_lx:1;
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u8 e100_base_fx:1;
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u8 e_base_bx10:1;
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u8 e_base_px:1;
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u8 fc_tech_electrical_inter_enclosure:1;
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u8 fc_tech_lc:1;
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u8 fc_tech_sa:1;
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u8 fc_ll_m:1;
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u8 fc_ll_l:1;
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u8 fc_ll_i:1;
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u8 fc_ll_s:1;
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u8 fc_ll_v:1;
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u8 unallocated_8_0:1;
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u8 unallocated_8_1:1;
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u8 sfp_ct_passive:1;
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u8 sfp_ct_active:1;
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u8 fc_tech_ll:1;
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u8 fc_tech_sl:1;
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u8 fc_tech_sn:1;
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u8 fc_tech_electrical_intra_enclosure:1;
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u8 fc_media_sm:1;
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u8 unallocated_9_1:1;
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u8 fc_media_m5:1;
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u8 fc_media_m6:1;
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u8 fc_media_tv:1;
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u8 fc_media_mi:1;
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u8 fc_media_tp:1;
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u8 fc_media_tw:1;
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u8 fc_speed_100:1;
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u8 unallocated_10_1:1;
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u8 fc_speed_200:1;
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u8 fc_speed_3200:1;
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u8 fc_speed_400:1;
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u8 fc_speed_1600:1;
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u8 fc_speed_800:1;
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u8 fc_speed_1200:1;
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#else
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#error Unknown Endian
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#endif
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u8 encoding;
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u8 br_nominal;
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u8 rate_id;
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u8 link_len[6];
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char vendor_name[16];
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u8 extended_cc;
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char vendor_oui[3];
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char vendor_pn[16];
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char vendor_rev[4];
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union {
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__be16 optical_wavelength;
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__be16 cable_compliance;
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struct {
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#if defined __BIG_ENDIAN_BITFIELD
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u8 reserved60_2:6;
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u8 fc_pi_4_app_h:1;
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u8 sff8431_app_e:1;
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u8 reserved61:8;
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#elif defined __LITTLE_ENDIAN_BITFIELD
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u8 sff8431_app_e:1;
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u8 fc_pi_4_app_h:1;
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u8 reserved60_2:6;
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u8 reserved61:8;
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#else
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#error Unknown Endian
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#endif
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} __packed passive;
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struct {
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#if defined __BIG_ENDIAN_BITFIELD
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u8 reserved60_4:4;
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u8 fc_pi_4_lim:1;
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u8 sff8431_lim:1;
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u8 fc_pi_4_app_h:1;
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u8 sff8431_app_e:1;
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u8 reserved61:8;
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#elif defined __LITTLE_ENDIAN_BITFIELD
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u8 sff8431_app_e:1;
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u8 fc_pi_4_app_h:1;
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u8 sff8431_lim:1;
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u8 fc_pi_4_lim:1;
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u8 reserved60_4:4;
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u8 reserved61:8;
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#else
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#error Unknown Endian
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#endif
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} __packed active;
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} __packed;
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u8 reserved62;
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u8 cc_base;
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} __packed;
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struct sfp_eeprom_ext {
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__be16 options;
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u8 br_max;
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u8 br_min;
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char vendor_sn[16];
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char datecode[8];
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u8 diagmon;
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u8 enhopts;
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u8 sff8472_compliance;
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u8 cc_ext;
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} __packed;
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/**
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* struct sfp_eeprom_id - raw SFP module identification information
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* @base: base SFP module identification structure
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* @ext: extended SFP module identification structure
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*
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* See the SFF-8472 specification and related documents for the definition
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* of these structure members. This can be obtained from
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* https://www.snia.org/technology-communities/sff/specifications
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*/
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struct sfp_eeprom_id {
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struct sfp_eeprom_base base;
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struct sfp_eeprom_ext ext;
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} __packed;
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struct sfp_diag {
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__be16 temp_high_alarm;
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__be16 temp_low_alarm;
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__be16 temp_high_warn;
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__be16 temp_low_warn;
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__be16 volt_high_alarm;
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__be16 volt_low_alarm;
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__be16 volt_high_warn;
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__be16 volt_low_warn;
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__be16 bias_high_alarm;
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__be16 bias_low_alarm;
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__be16 bias_high_warn;
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__be16 bias_low_warn;
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__be16 txpwr_high_alarm;
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__be16 txpwr_low_alarm;
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__be16 txpwr_high_warn;
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__be16 txpwr_low_warn;
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__be16 rxpwr_high_alarm;
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__be16 rxpwr_low_alarm;
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__be16 rxpwr_high_warn;
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__be16 rxpwr_low_warn;
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__be16 laser_temp_high_alarm;
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__be16 laser_temp_low_alarm;
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__be16 laser_temp_high_warn;
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__be16 laser_temp_low_warn;
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__be16 tec_cur_high_alarm;
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__be16 tec_cur_low_alarm;
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__be16 tec_cur_high_warn;
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__be16 tec_cur_low_warn;
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__be32 cal_rxpwr4;
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__be32 cal_rxpwr3;
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__be32 cal_rxpwr2;
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__be32 cal_rxpwr1;
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__be32 cal_rxpwr0;
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__be16 cal_txi_slope;
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__be16 cal_txi_offset;
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__be16 cal_txpwr_slope;
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__be16 cal_txpwr_offset;
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__be16 cal_t_slope;
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__be16 cal_t_offset;
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__be16 cal_v_slope;
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__be16 cal_v_offset;
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} __packed;
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/* SFF8024 defined constants */
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enum {
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SFF8024_ID_UNK = 0x00,
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SFF8024_ID_SFF_8472 = 0x02,
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SFF8024_ID_SFP = 0x03,
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SFF8024_ID_DWDM_SFP = 0x0b,
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SFF8024_ID_QSFP_8438 = 0x0c,
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SFF8024_ID_QSFP_8436_8636 = 0x0d,
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SFF8024_ID_QSFP28_8636 = 0x11,
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SFF8024_ENCODING_UNSPEC = 0x00,
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SFF8024_ENCODING_8B10B = 0x01,
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SFF8024_ENCODING_4B5B = 0x02,
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SFF8024_ENCODING_NRZ = 0x03,
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SFF8024_ENCODING_8472_MANCHESTER= 0x04,
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SFF8024_ENCODING_8472_SONET = 0x05,
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SFF8024_ENCODING_8472_64B66B = 0x06,
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SFF8024_ENCODING_8436_MANCHESTER= 0x06,
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SFF8024_ENCODING_8436_SONET = 0x04,
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SFF8024_ENCODING_8436_64B66B = 0x05,
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SFF8024_ENCODING_256B257B = 0x07,
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SFF8024_ENCODING_PAM4 = 0x08,
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SFF8024_CONNECTOR_UNSPEC = 0x00,
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/* codes 01-05 not supportable on SFP, but some modules have single SC */
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SFF8024_CONNECTOR_SC = 0x01,
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SFF8024_CONNECTOR_FIBERJACK = 0x06,
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SFF8024_CONNECTOR_LC = 0x07,
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SFF8024_CONNECTOR_MT_RJ = 0x08,
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SFF8024_CONNECTOR_MU = 0x09,
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SFF8024_CONNECTOR_SG = 0x0a,
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SFF8024_CONNECTOR_OPTICAL_PIGTAIL= 0x0b,
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SFF8024_CONNECTOR_MPO_1X12 = 0x0c,
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SFF8024_CONNECTOR_MPO_2X16 = 0x0d,
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SFF8024_CONNECTOR_HSSDC_II = 0x20,
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SFF8024_CONNECTOR_COPPER_PIGTAIL= 0x21,
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SFF8024_CONNECTOR_RJ45 = 0x22,
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SFF8024_CONNECTOR_NOSEPARATE = 0x23,
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SFF8024_CONNECTOR_MXC_2X16 = 0x24,
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SFF8024_ECC_UNSPEC = 0x00,
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SFF8024_ECC_100G_25GAUI_C2M_AOC = 0x01,
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SFF8024_ECC_100GBASE_SR4_25GBASE_SR = 0x02,
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SFF8024_ECC_100GBASE_LR4_25GBASE_LR = 0x03,
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SFF8024_ECC_100GBASE_ER4_25GBASE_ER = 0x04,
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SFF8024_ECC_100GBASE_SR10 = 0x05,
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SFF8024_ECC_100GBASE_CR4 = 0x0b,
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SFF8024_ECC_25GBASE_CR_S = 0x0c,
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SFF8024_ECC_25GBASE_CR_N = 0x0d,
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SFF8024_ECC_10GBASE_T_SFI = 0x16,
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SFF8024_ECC_10GBASE_T_SR = 0x1c,
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SFF8024_ECC_5GBASE_T = 0x1d,
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SFF8024_ECC_2_5GBASE_T = 0x1e,
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};
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/* SFP EEPROM registers */
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enum {
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SFP_PHYS_ID = 0x00,
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SFP_PHYS_EXT_ID = 0x01,
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SFP_CONNECTOR = 0x02,
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SFP_COMPLIANCE = 0x03,
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SFP_ENCODING = 0x0b,
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SFP_BR_NOMINAL = 0x0c,
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SFP_RATE_ID = 0x0d,
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SFP_LINK_LEN_SM_KM = 0x0e,
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SFP_LINK_LEN_SM_100M = 0x0f,
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SFP_LINK_LEN_50UM_OM2_10M = 0x10,
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SFP_LINK_LEN_62_5UM_OM1_10M = 0x11,
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SFP_LINK_LEN_COPPER_1M = 0x12,
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SFP_LINK_LEN_50UM_OM4_10M = 0x12,
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SFP_LINK_LEN_50UM_OM3_10M = 0x13,
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SFP_VENDOR_NAME = 0x14,
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SFP_VENDOR_OUI = 0x25,
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SFP_VENDOR_PN = 0x28,
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SFP_VENDOR_REV = 0x38,
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SFP_OPTICAL_WAVELENGTH_MSB = 0x3c,
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SFP_OPTICAL_WAVELENGTH_LSB = 0x3d,
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SFP_CABLE_SPEC = 0x3c,
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SFP_CC_BASE = 0x3f,
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SFP_OPTIONS = 0x40, /* 2 bytes, MSB, LSB */
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SFP_BR_MAX = 0x42,
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SFP_BR_MIN = 0x43,
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SFP_VENDOR_SN = 0x44,
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SFP_DATECODE = 0x54,
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SFP_DIAGMON = 0x5c,
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SFP_ENHOPTS = 0x5d,
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SFP_SFF8472_COMPLIANCE = 0x5e,
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SFP_CC_EXT = 0x5f,
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SFP_PHYS_EXT_ID_SFP = 0x04,
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SFP_OPTIONS_HIGH_POWER_LEVEL = BIT(13),
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SFP_OPTIONS_PAGING_A2 = BIT(12),
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SFP_OPTIONS_RETIMER = BIT(11),
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SFP_OPTIONS_COOLED_XCVR = BIT(10),
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SFP_OPTIONS_POWER_DECL = BIT(9),
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SFP_OPTIONS_RX_LINEAR_OUT = BIT(8),
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SFP_OPTIONS_RX_DECISION_THRESH = BIT(7),
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SFP_OPTIONS_TUNABLE_TX = BIT(6),
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SFP_OPTIONS_RATE_SELECT = BIT(5),
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SFP_OPTIONS_TX_DISABLE = BIT(4),
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SFP_OPTIONS_TX_FAULT = BIT(3),
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SFP_OPTIONS_LOS_INVERTED = BIT(2),
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SFP_OPTIONS_LOS_NORMAL = BIT(1),
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SFP_DIAGMON_DDM = BIT(6),
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SFP_DIAGMON_INT_CAL = BIT(5),
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SFP_DIAGMON_EXT_CAL = BIT(4),
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SFP_DIAGMON_RXPWR_AVG = BIT(3),
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SFP_DIAGMON_ADDRMODE = BIT(2),
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SFP_ENHOPTS_ALARMWARN = BIT(7),
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SFP_ENHOPTS_SOFT_TX_DISABLE = BIT(6),
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SFP_ENHOPTS_SOFT_TX_FAULT = BIT(5),
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SFP_ENHOPTS_SOFT_RX_LOS = BIT(4),
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SFP_ENHOPTS_SOFT_RATE_SELECT = BIT(3),
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SFP_ENHOPTS_APP_SELECT_SFF8079 = BIT(2),
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SFP_ENHOPTS_SOFT_RATE_SFF8431 = BIT(1),
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SFP_SFF8472_COMPLIANCE_NONE = 0x00,
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SFP_SFF8472_COMPLIANCE_REV9_3 = 0x01,
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SFP_SFF8472_COMPLIANCE_REV9_5 = 0x02,
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SFP_SFF8472_COMPLIANCE_REV10_2 = 0x03,
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SFP_SFF8472_COMPLIANCE_REV10_4 = 0x04,
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SFP_SFF8472_COMPLIANCE_REV11_0 = 0x05,
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SFP_SFF8472_COMPLIANCE_REV11_3 = 0x06,
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SFP_SFF8472_COMPLIANCE_REV11_4 = 0x07,
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SFP_SFF8472_COMPLIANCE_REV12_0 = 0x08,
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};
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/* SFP Diagnostics */
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enum {
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/* Alarm and warnings stored MSB at lower address then LSB */
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SFP_TEMP_HIGH_ALARM = 0x00,
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SFP_TEMP_LOW_ALARM = 0x02,
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SFP_TEMP_HIGH_WARN = 0x04,
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SFP_TEMP_LOW_WARN = 0x06,
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SFP_VOLT_HIGH_ALARM = 0x08,
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SFP_VOLT_LOW_ALARM = 0x0a,
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SFP_VOLT_HIGH_WARN = 0x0c,
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SFP_VOLT_LOW_WARN = 0x0e,
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SFP_BIAS_HIGH_ALARM = 0x10,
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SFP_BIAS_LOW_ALARM = 0x12,
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SFP_BIAS_HIGH_WARN = 0x14,
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SFP_BIAS_LOW_WARN = 0x16,
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SFP_TXPWR_HIGH_ALARM = 0x18,
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SFP_TXPWR_LOW_ALARM = 0x1a,
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SFP_TXPWR_HIGH_WARN = 0x1c,
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SFP_TXPWR_LOW_WARN = 0x1e,
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SFP_RXPWR_HIGH_ALARM = 0x20,
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SFP_RXPWR_LOW_ALARM = 0x22,
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SFP_RXPWR_HIGH_WARN = 0x24,
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SFP_RXPWR_LOW_WARN = 0x26,
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SFP_LASER_TEMP_HIGH_ALARM = 0x28,
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SFP_LASER_TEMP_LOW_ALARM = 0x2a,
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SFP_LASER_TEMP_HIGH_WARN = 0x2c,
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SFP_LASER_TEMP_LOW_WARN = 0x2e,
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SFP_TEC_CUR_HIGH_ALARM = 0x30,
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SFP_TEC_CUR_LOW_ALARM = 0x32,
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SFP_TEC_CUR_HIGH_WARN = 0x34,
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SFP_TEC_CUR_LOW_WARN = 0x36,
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SFP_CAL_RXPWR4 = 0x38,
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SFP_CAL_RXPWR3 = 0x3c,
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SFP_CAL_RXPWR2 = 0x40,
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SFP_CAL_RXPWR1 = 0x44,
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SFP_CAL_RXPWR0 = 0x48,
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SFP_CAL_TXI_SLOPE = 0x4c,
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SFP_CAL_TXI_OFFSET = 0x4e,
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SFP_CAL_TXPWR_SLOPE = 0x50,
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SFP_CAL_TXPWR_OFFSET = 0x52,
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SFP_CAL_T_SLOPE = 0x54,
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SFP_CAL_T_OFFSET = 0x56,
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SFP_CAL_V_SLOPE = 0x58,
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SFP_CAL_V_OFFSET = 0x5a,
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SFP_CHKSUM = 0x5f,
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SFP_TEMP = 0x60,
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SFP_VCC = 0x62,
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SFP_TX_BIAS = 0x64,
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SFP_TX_POWER = 0x66,
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SFP_RX_POWER = 0x68,
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SFP_LASER_TEMP = 0x6a,
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SFP_TEC_CUR = 0x6c,
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SFP_STATUS = 0x6e,
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SFP_STATUS_TX_DISABLE = BIT(7),
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SFP_STATUS_TX_DISABLE_FORCE = BIT(6),
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SFP_STATUS_TX_FAULT = BIT(2),
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SFP_STATUS_RX_LOS = BIT(1),
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SFP_ALARM0 = 0x70,
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SFP_ALARM0_TEMP_HIGH = BIT(7),
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SFP_ALARM0_TEMP_LOW = BIT(6),
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SFP_ALARM0_VCC_HIGH = BIT(5),
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SFP_ALARM0_VCC_LOW = BIT(4),
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SFP_ALARM0_TX_BIAS_HIGH = BIT(3),
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SFP_ALARM0_TX_BIAS_LOW = BIT(2),
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SFP_ALARM0_TXPWR_HIGH = BIT(1),
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SFP_ALARM0_TXPWR_LOW = BIT(0),
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SFP_ALARM1 = 0x71,
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SFP_ALARM1_RXPWR_HIGH = BIT(7),
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SFP_ALARM1_RXPWR_LOW = BIT(6),
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SFP_WARN0 = 0x74,
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SFP_WARN0_TEMP_HIGH = BIT(7),
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SFP_WARN0_TEMP_LOW = BIT(6),
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SFP_WARN0_VCC_HIGH = BIT(5),
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SFP_WARN0_VCC_LOW = BIT(4),
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SFP_WARN0_TX_BIAS_HIGH = BIT(3),
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SFP_WARN0_TX_BIAS_LOW = BIT(2),
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SFP_WARN0_TXPWR_HIGH = BIT(1),
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SFP_WARN0_TXPWR_LOW = BIT(0),
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SFP_WARN1 = 0x75,
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SFP_WARN1_RXPWR_HIGH = BIT(7),
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SFP_WARN1_RXPWR_LOW = BIT(6),
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SFP_EXT_STATUS = 0x76,
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SFP_VSL = 0x78,
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SFP_PAGE = 0x7f,
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};
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struct fwnode_handle;
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struct ethtool_eeprom;
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struct ethtool_modinfo;
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struct sfp_bus;
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/**
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* struct sfp_upstream_ops - upstream operations structure
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* @attach: called when the sfp socket driver is bound to the upstream
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* (mandatory).
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* @detach: called when the sfp socket driver is unbound from the upstream
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* (mandatory).
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* @module_insert: called after a module has been detected to determine
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* whether the module is supported for the upstream device.
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* @module_remove: called after the module has been removed.
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* @module_start: called after the PHY probe step
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* @module_stop: called before the PHY is removed
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* @link_down: called when the link is non-operational for whatever
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* reason.
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* @link_up: called when the link is operational.
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* @connect_phy: called when an I2C accessible PHY has been detected
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* on the module.
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* @disconnect_phy: called when a module with an I2C accessible PHY has
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* been removed.
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*/
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struct sfp_upstream_ops {
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void (*attach)(void *priv, struct sfp_bus *bus);
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void (*detach)(void *priv, struct sfp_bus *bus);
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int (*module_insert)(void *priv, const struct sfp_eeprom_id *id);
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void (*module_remove)(void *priv);
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int (*module_start)(void *priv);
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void (*module_stop)(void *priv);
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void (*link_down)(void *priv);
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void (*link_up)(void *priv);
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int (*connect_phy)(void *priv, struct phy_device *);
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void (*disconnect_phy)(void *priv);
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};
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#if IS_ENABLED(CONFIG_SFP)
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int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
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unsigned long *support);
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bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id);
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void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,
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unsigned long *support);
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phy_interface_t sfp_select_interface(struct sfp_bus *bus,
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unsigned long *link_modes);
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int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo);
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int sfp_get_module_eeprom(struct sfp_bus *bus, struct ethtool_eeprom *ee,
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u8 *data);
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void sfp_upstream_start(struct sfp_bus *bus);
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void sfp_upstream_stop(struct sfp_bus *bus);
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void sfp_bus_put(struct sfp_bus *bus);
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struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode);
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int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
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const struct sfp_upstream_ops *ops);
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void sfp_bus_del_upstream(struct sfp_bus *bus);
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#else
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static inline int sfp_parse_port(struct sfp_bus *bus,
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const struct sfp_eeprom_id *id,
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unsigned long *support)
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{
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return PORT_OTHER;
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}
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static inline bool sfp_may_have_phy(struct sfp_bus *bus,
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const struct sfp_eeprom_id *id)
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{
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return false;
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}
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static inline void sfp_parse_support(struct sfp_bus *bus,
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const struct sfp_eeprom_id *id,
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unsigned long *support)
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{
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}
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static inline phy_interface_t sfp_select_interface(struct sfp_bus *bus,
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unsigned long *link_modes)
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{
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return PHY_INTERFACE_MODE_NA;
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}
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static inline int sfp_get_module_info(struct sfp_bus *bus,
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struct ethtool_modinfo *modinfo)
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{
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return -EOPNOTSUPP;
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}
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static inline int sfp_get_module_eeprom(struct sfp_bus *bus,
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struct ethtool_eeprom *ee, u8 *data)
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{
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return -EOPNOTSUPP;
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}
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static inline void sfp_upstream_start(struct sfp_bus *bus)
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{
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}
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static inline void sfp_upstream_stop(struct sfp_bus *bus)
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{
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}
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static inline void sfp_bus_put(struct sfp_bus *bus)
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{
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}
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static inline struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode)
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{
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return NULL;
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}
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static inline int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
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const struct sfp_upstream_ops *ops)
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{
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return 0;
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}
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static inline void sfp_bus_del_upstream(struct sfp_bus *bus)
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{
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}
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#endif
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#endif
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