mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 18:36:42 +07:00
3922d5180f
Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
309 lines
7.3 KiB
C
309 lines
7.3 KiB
C
/*
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* AK4104 ALSA SoC (ASoC) driver
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*
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* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <linux/spi/spi.h>
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#include <sound/asoundef.h>
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/* AK4104 registers addresses */
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#define AK4104_REG_CONTROL1 0x00
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#define AK4104_REG_RESERVED 0x01
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#define AK4104_REG_CONTROL2 0x02
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#define AK4104_REG_TX 0x03
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#define AK4104_REG_CHN_STATUS(x) ((x) + 0x04)
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#define AK4104_NUM_REGS 10
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#define AK4104_REG_MASK 0x1f
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#define AK4104_READ 0xc0
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#define AK4104_WRITE 0xe0
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#define AK4104_RESERVED_VAL 0x5b
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/* Bit masks for AK4104 registers */
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#define AK4104_CONTROL1_RSTN (1 << 0)
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#define AK4104_CONTROL1_PW (1 << 1)
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#define AK4104_CONTROL1_DIF0 (1 << 2)
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#define AK4104_CONTROL1_DIF1 (1 << 3)
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#define AK4104_CONTROL2_SEL0 (1 << 0)
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#define AK4104_CONTROL2_SEL1 (1 << 1)
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#define AK4104_CONTROL2_MODE (1 << 2)
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#define AK4104_TX_TXE (1 << 0)
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#define AK4104_TX_V (1 << 1)
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#define DRV_NAME "ak4104-codec"
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struct ak4104_private {
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enum snd_soc_control_type control_type;
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void *control_data;
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};
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static int ak4104_fill_cache(struct snd_soc_codec *codec)
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{
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int i;
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u8 *reg_cache = codec->reg_cache;
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struct spi_device *spi = codec->control_data;
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for (i = 0; i < codec->driver->reg_cache_size; i++) {
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int ret = spi_w8r8(spi, i | AK4104_READ);
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if (ret < 0) {
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dev_err(&spi->dev, "SPI write failure\n");
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return ret;
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}
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reg_cache[i] = ret;
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}
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return 0;
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}
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static unsigned int ak4104_read_reg_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u8 *reg_cache = codec->reg_cache;
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if (reg >= codec->driver->reg_cache_size)
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return -EINVAL;
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return reg_cache[reg];
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}
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static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u8 *cache = codec->reg_cache;
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struct spi_device *spi = codec->control_data;
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if (reg >= codec->driver->reg_cache_size)
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return -EINVAL;
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/* only write to the hardware if value has changed */
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if (cache[reg] != value) {
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u8 tmp[2] = { (reg & AK4104_REG_MASK) | AK4104_WRITE, value };
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if (spi_write(spi, tmp, sizeof(tmp))) {
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dev_err(&spi->dev, "SPI write failed\n");
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return -EIO;
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}
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cache[reg] = value;
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}
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return 0;
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}
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static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int format)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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int val = 0;
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val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1);
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if (val < 0)
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return val;
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val &= ~(AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1);
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/* set DAI format */
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switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_RIGHT_J:
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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val |= AK4104_CONTROL1_DIF0;
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break;
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case SND_SOC_DAIFMT_I2S:
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val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1;
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break;
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default:
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dev_err(codec->dev, "invalid dai format\n");
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return -EINVAL;
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}
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/* This device can only be slave */
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if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
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return -EINVAL;
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return ak4104_spi_write(codec, AK4104_REG_CONTROL1, val);
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}
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static int ak4104_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_codec *codec = rtd->codec;
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int val = 0;
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/* set the IEC958 bits: consumer mode, no copyright bit */
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val |= IEC958_AES0_CON_NOT_COPYRIGHT;
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ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(0), val);
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val = 0;
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switch (params_rate(params)) {
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case 44100:
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val |= IEC958_AES3_CON_FS_44100;
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break;
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case 48000:
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val |= IEC958_AES3_CON_FS_48000;
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break;
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case 32000:
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val |= IEC958_AES3_CON_FS_32000;
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break;
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default:
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dev_err(codec->dev, "unsupported sampling rate\n");
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return -EINVAL;
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}
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return ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(3), val);
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}
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static const struct snd_soc_dai_ops ak4101_dai_ops = {
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.hw_params = ak4104_hw_params,
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.set_fmt = ak4104_set_dai_fmt,
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};
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static struct snd_soc_dai_driver ak4104_dai = {
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.name = "ak4104-hifi",
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.playback = {
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.stream_name = "Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_192000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE |
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SNDRV_PCM_FMTBIT_S24_3LE |
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SNDRV_PCM_FMTBIT_S24_LE
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},
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.ops = &ak4101_dai_ops,
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};
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static int ak4104_probe(struct snd_soc_codec *codec)
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{
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struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
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int ret, val;
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codec->control_data = ak4104->control_data;
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/* read all regs and fill the cache */
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ret = ak4104_fill_cache(codec);
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if (ret < 0) {
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dev_err(codec->dev, "failed to fill register cache\n");
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return ret;
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}
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/* read the 'reserved' register - according to the datasheet, it
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* should contain 0x5b. Not a good way to verify the presence of
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* the device, but there is no hardware ID register. */
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if (ak4104_read_reg_cache(codec, AK4104_REG_RESERVED) !=
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AK4104_RESERVED_VAL)
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return -ENODEV;
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/* set power-up and non-reset bits */
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val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1);
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val |= AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN;
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ret = ak4104_spi_write(codec, AK4104_REG_CONTROL1, val);
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if (ret < 0)
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return ret;
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/* enable transmitter */
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val = ak4104_read_reg_cache(codec, AK4104_REG_TX);
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val |= AK4104_TX_TXE;
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ret = ak4104_spi_write(codec, AK4104_REG_TX, val);
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if (ret < 0)
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return ret;
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dev_info(codec->dev, "SPI device initialized\n");
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return 0;
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}
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static int ak4104_remove(struct snd_soc_codec *codec)
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{
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int val, ret;
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val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1);
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if (val < 0)
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return val;
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/* clear power-up and non-reset bits */
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val &= ~(AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN);
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ret = ak4104_spi_write(codec, AK4104_REG_CONTROL1, val);
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return ret;
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}
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static struct snd_soc_codec_driver soc_codec_device_ak4104 = {
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.probe = ak4104_probe,
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.remove = ak4104_remove,
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.reg_cache_size = AK4104_NUM_REGS,
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.reg_word_size = sizeof(u8),
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};
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static int ak4104_spi_probe(struct spi_device *spi)
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{
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struct ak4104_private *ak4104;
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int ret;
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spi->bits_per_word = 8;
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spi->mode = SPI_MODE_0;
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ret = spi_setup(spi);
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if (ret < 0)
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return ret;
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ak4104 = devm_kzalloc(&spi->dev, sizeof(struct ak4104_private),
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GFP_KERNEL);
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if (ak4104 == NULL)
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return -ENOMEM;
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ak4104->control_data = spi;
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ak4104->control_type = SND_SOC_SPI;
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spi_set_drvdata(spi, ak4104);
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ret = snd_soc_register_codec(&spi->dev,
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&soc_codec_device_ak4104, &ak4104_dai, 1);
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return ret;
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}
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static int __devexit ak4104_spi_remove(struct spi_device *spi)
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{
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snd_soc_unregister_codec(&spi->dev);
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return 0;
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}
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static struct spi_driver ak4104_spi_driver = {
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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.probe = ak4104_spi_probe,
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.remove = __devexit_p(ak4104_spi_remove),
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};
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static int __init ak4104_init(void)
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{
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return spi_register_driver(&ak4104_spi_driver);
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}
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module_init(ak4104_init);
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static void __exit ak4104_exit(void)
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{
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spi_unregister_driver(&ak4104_spi_driver);
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}
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module_exit(ak4104_exit);
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MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
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MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver");
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MODULE_LICENSE("GPL");
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