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8193abb6a8
For dependencies, branch based on 'mellanox/mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux.git Pull Dump and fill MKEY from Leon Romanovsky: ==================== MLX5 IB HCA offers the memory key, dump_fill_mkey to increase performance, when used in a send or receive operations. It is used to force local HCA operations to skip the PCI bus access, while keeping track of the processed length in the ibv_sge handling. In this three patch series, we expose various bits in our HW spec file (mlx5_ifc.h), move unneeded for mlx5_core FW command and export such memory key to user space thought our mlx5-abi header file. ==================== Botched auto-merge in mlx5_ib_alloc_ucontext() resolved by hand. * branch 'mlx5-dump-fill-mkey': IB/mlx5: Expose dump and fill memory key net/mlx5: Add hardware definitions for dump_fill_mkey net/mlx5: Limit scope of dump_fill_mkey function net/mlx5: Rate limit errors in command interface Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
200 lines
6.1 KiB
C
200 lines
6.1 KiB
C
/*
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* Copyright (c) 2017, Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "cmd.h"
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int mlx5_cmd_dump_fill_mkey(struct mlx5_core_dev *dev, u32 *mkey)
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{
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u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {0};
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u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {0};
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int err;
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MLX5_SET(query_special_contexts_in, in, opcode,
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MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
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err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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if (!err)
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*mkey = MLX5_GET(query_special_contexts_out, out,
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dump_fill_mkey);
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return err;
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}
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int mlx5_cmd_null_mkey(struct mlx5_core_dev *dev, u32 *null_mkey)
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{
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u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {};
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u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {};
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int err;
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MLX5_SET(query_special_contexts_in, in, opcode,
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MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
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err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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if (!err)
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*null_mkey = MLX5_GET(query_special_contexts_out, out,
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null_mkey);
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return err;
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}
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int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,
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void *out, int out_size)
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{
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u32 in[MLX5_ST_SZ_DW(query_cong_params_in)] = { };
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MLX5_SET(query_cong_params_in, in, opcode,
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MLX5_CMD_OP_QUERY_CONG_PARAMS);
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MLX5_SET(query_cong_params_in, in, cong_protocol, cong_point);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, out_size);
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}
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int mlx5_cmd_modify_cong_params(struct mlx5_core_dev *dev,
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void *in, int in_size)
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{
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u32 out[MLX5_ST_SZ_DW(modify_cong_params_out)] = { };
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return mlx5_cmd_exec(dev, in, in_size, out, sizeof(out));
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}
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int mlx5_cmd_alloc_memic(struct mlx5_memic *memic, phys_addr_t *addr,
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u64 length, u32 alignment)
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{
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struct mlx5_core_dev *dev = memic->dev;
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u64 num_memic_hw_pages = MLX5_CAP_DEV_MEM(dev, memic_bar_size)
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>> PAGE_SHIFT;
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u64 hw_start_addr = MLX5_CAP64_DEV_MEM(dev, memic_bar_start_addr);
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u32 max_alignment = MLX5_CAP_DEV_MEM(dev, log_max_memic_addr_alignment);
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u32 num_pages = DIV_ROUND_UP(length, PAGE_SIZE);
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u32 out[MLX5_ST_SZ_DW(alloc_memic_out)] = {};
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u32 in[MLX5_ST_SZ_DW(alloc_memic_in)] = {};
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u32 mlx5_alignment;
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u64 page_idx = 0;
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int ret = 0;
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if (!length || (length & MLX5_MEMIC_ALLOC_SIZE_MASK))
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return -EINVAL;
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/* mlx5 device sets alignment as 64*2^driver_value
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* so normalizing is needed.
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*/
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mlx5_alignment = (alignment < MLX5_MEMIC_BASE_ALIGN) ? 0 :
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alignment - MLX5_MEMIC_BASE_ALIGN;
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if (mlx5_alignment > max_alignment)
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return -EINVAL;
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MLX5_SET(alloc_memic_in, in, opcode, MLX5_CMD_OP_ALLOC_MEMIC);
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MLX5_SET(alloc_memic_in, in, range_size, num_pages * PAGE_SIZE);
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MLX5_SET(alloc_memic_in, in, memic_size, length);
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MLX5_SET(alloc_memic_in, in, log_memic_addr_alignment,
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mlx5_alignment);
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while (page_idx < num_memic_hw_pages) {
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spin_lock(&memic->memic_lock);
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page_idx = bitmap_find_next_zero_area(memic->memic_alloc_pages,
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num_memic_hw_pages,
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page_idx,
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num_pages, 0);
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if (page_idx < num_memic_hw_pages)
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bitmap_set(memic->memic_alloc_pages,
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page_idx, num_pages);
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spin_unlock(&memic->memic_lock);
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if (page_idx >= num_memic_hw_pages)
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break;
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MLX5_SET64(alloc_memic_in, in, range_start_addr,
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hw_start_addr + (page_idx * PAGE_SIZE));
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ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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if (ret) {
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spin_lock(&memic->memic_lock);
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bitmap_clear(memic->memic_alloc_pages,
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page_idx, num_pages);
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spin_unlock(&memic->memic_lock);
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if (ret == -EAGAIN) {
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page_idx++;
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continue;
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}
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return ret;
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}
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*addr = pci_resource_start(dev->pdev, 0) +
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MLX5_GET64(alloc_memic_out, out, memic_start_addr);
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return 0;
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}
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return -ENOMEM;
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}
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int mlx5_cmd_dealloc_memic(struct mlx5_memic *memic, u64 addr, u64 length)
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{
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struct mlx5_core_dev *dev = memic->dev;
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u64 hw_start_addr = MLX5_CAP64_DEV_MEM(dev, memic_bar_start_addr);
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u32 num_pages = DIV_ROUND_UP(length, PAGE_SIZE);
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u32 out[MLX5_ST_SZ_DW(dealloc_memic_out)] = {0};
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u32 in[MLX5_ST_SZ_DW(dealloc_memic_in)] = {0};
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u64 start_page_idx;
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int err;
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addr -= pci_resource_start(dev->pdev, 0);
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start_page_idx = (addr - hw_start_addr) >> PAGE_SHIFT;
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MLX5_SET(dealloc_memic_in, in, opcode, MLX5_CMD_OP_DEALLOC_MEMIC);
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MLX5_SET64(dealloc_memic_in, in, memic_start_addr, addr);
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MLX5_SET(dealloc_memic_in, in, memic_size, length);
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err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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if (!err) {
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spin_lock(&memic->memic_lock);
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bitmap_clear(memic->memic_alloc_pages,
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start_page_idx, num_pages);
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spin_unlock(&memic->memic_lock);
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}
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return err;
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}
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int mlx5_cmd_query_ext_ppcnt_counters(struct mlx5_core_dev *dev, void *out)
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{
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u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {};
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int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
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MLX5_SET(ppcnt_reg, in, local_port, 1);
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MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP);
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return mlx5_core_access_reg(dev, in, sz, out, sz, MLX5_REG_PPCNT,
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0, 0);
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}
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