linux_dsm_epyc7002/Documentation/virtual
Cédric Le Goater 39e9af3de5 KVM: PPC: Book3S HV: XIVE: Add a TIMA mapping
Each thread has an associated Thread Interrupt Management context
composed of a set of registers. These registers let the thread handle
priority management and interrupt acknowledgment. The most important
are :

    - Interrupt Pending Buffer     (IPB)
    - Current Processor Priority   (CPPR)
    - Notification Source Register (NSR)

They are exposed to software in four different pages each proposing a
view with a different privilege. The first page is for the physical
thread context and the second for the hypervisor. Only the third
(operating system) and the fourth (user level) are exposed the guest.

A custom VM fault handler will populate the VMA with the appropriate
pages, which should only be the OS page for now.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2019-04-30 19:35:16 +10:00
..
kvm KVM: PPC: Book3S HV: XIVE: Add a TIMA mapping 2019-04-30 19:35:16 +10:00
uml Documentation: Update path to sysrq.txt 2017-03-03 15:48:38 -07:00
paravirt_ops.txt virtual: Documentation: simplify and generalize paravirt_ops.txt 2015-02-13 17:15:44 +10:30