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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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564889c1c0
Add return values to the PM constraint functions. This allows the PM core to provide feedback to the caller if a constraint is not possible. Update the one upstream user of omap_pm_set_max_mpu_wakeup_lat() to add a compatibility wrapper, needed until the driver is changed. Update some of the documentation to conform more closely to kerneldoc style. Add an additional device parameter to omap_pm_set_max_dev_wakeup_lat() to identify the device requesting the constraint. This is so repeated calls to omap_pm_set_max_dev_wakeup_lat() with the same requesting device can override the device's previously-set constraint. Also, it allows the PM core to make a decision as to whether or not the constraint should be satisfied, based on the caller's identity. Signed-off-by: Paul Walmsley <paul@pwsan.com>
277 lines
6.7 KiB
C
277 lines
6.7 KiB
C
/*
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* linux/arch/arm/plat-omap/i2c.c
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*
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* Helper module for board specific I2C bus registration
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*
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* Copyright (C) 2007 Nokia Corporation.
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*
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* Contact: Jarkko Nikula <jhnikula@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#include <mach/irqs.h>
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#include <plat/mux.h>
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#include <plat/i2c.h>
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#include <plat/omap-pm.h>
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#define OMAP_I2C_SIZE 0x3f
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#define OMAP1_I2C_BASE 0xfffb3800
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#define OMAP2_I2C_BASE1 0x48070000
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#define OMAP2_I2C_BASE2 0x48072000
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#define OMAP2_I2C_BASE3 0x48060000
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#define OMAP4_I2C_BASE4 0x48350000
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static const char name[] = "i2c_omap";
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#define I2C_RESOURCE_BUILDER(base, irq) \
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{ \
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.start = (base), \
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.end = (base) + OMAP_I2C_SIZE, \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = (irq), \
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.flags = IORESOURCE_IRQ, \
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},
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static struct resource i2c_resources[][2] = {
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{ I2C_RESOURCE_BUILDER(0, 0) },
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#if defined(CONFIG_ARCH_OMAP2PLUS)
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{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, 0) },
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#endif
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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{ I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, 0) },
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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{ I2C_RESOURCE_BUILDER(OMAP4_I2C_BASE4, 0) },
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#endif
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};
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#define I2C_DEV_BUILDER(bus_id, res, data) \
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{ \
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.id = (bus_id), \
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.name = name, \
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.num_resources = ARRAY_SIZE(res), \
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.resource = (res), \
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.dev = { \
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.platform_data = (data), \
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}, \
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}
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static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
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static struct platform_device omap_i2c_devices[] = {
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I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
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#if defined(CONFIG_ARCH_OMAP2PLUS)
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I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
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#endif
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#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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I2C_DEV_BUILDER(4, i2c_resources[3], &i2c_pdata[3]),
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#endif
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};
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#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
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static int __init omap_i2c_nr_ports(void)
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{
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int ports = 0;
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if (cpu_class_is_omap1())
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ports = 1;
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else if (cpu_is_omap24xx())
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ports = 2;
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else if (cpu_is_omap34xx())
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ports = 3;
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else if (cpu_is_omap44xx())
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ports = 4;
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return ports;
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}
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/* Shared between omap2 and 3 */
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static resource_size_t omap2_i2c_irq[3] __initdata = {
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INT_24XX_I2C1_IRQ,
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INT_24XX_I2C2_IRQ,
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INT_34XX_I2C3_IRQ,
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};
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static resource_size_t omap4_i2c_irq[4] __initdata = {
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OMAP44XX_IRQ_I2C1,
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OMAP44XX_IRQ_I2C2,
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OMAP44XX_IRQ_I2C3,
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OMAP44XX_IRQ_I2C4,
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};
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static inline int omap1_i2c_add_bus(struct platform_device *pdev, int bus_id)
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{
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struct omap_i2c_bus_platform_data *pd;
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struct resource *res;
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pd = pdev->dev.platform_data;
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res = pdev->resource;
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res[0].start = OMAP1_I2C_BASE;
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res[0].end = res[0].start + OMAP_I2C_SIZE;
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res[1].start = INT_I2C;
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omap1_i2c_mux_pins(bus_id);
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return platform_device_register(pdev);
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}
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/*
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* XXX This function is a temporary compatibility wrapper - only
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* needed until the I2C driver can be converted to call
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* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
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*/
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static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
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{
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omap_pm_set_max_mpu_wakeup_lat(dev, t);
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}
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static inline int omap2_i2c_add_bus(struct platform_device *pdev, int bus_id)
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{
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struct resource *res;
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resource_size_t *irq;
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res = pdev->resource;
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if (!cpu_is_omap44xx())
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irq = omap2_i2c_irq;
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else
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irq = omap4_i2c_irq;
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if (bus_id == 1) {
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res[0].start = OMAP2_I2C_BASE1;
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res[0].end = res[0].start + OMAP_I2C_SIZE;
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}
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res[1].start = irq[bus_id - 1];
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omap2_i2c_mux_pins(bus_id);
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/*
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* When waiting for completion of a i2c transfer, we need to
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* set a wake up latency constraint for the MPU. This is to
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* ensure quick enough wakeup from idle, when transfer
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* completes.
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*/
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if (cpu_is_omap34xx()) {
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struct omap_i2c_bus_platform_data *pd;
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pd = pdev->dev.platform_data;
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pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
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}
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return platform_device_register(pdev);
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}
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static int __init omap_i2c_add_bus(int bus_id)
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{
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struct platform_device *pdev;
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pdev = &omap_i2c_devices[bus_id - 1];
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if (cpu_class_is_omap1())
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return omap1_i2c_add_bus(pdev, bus_id);
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else
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return omap2_i2c_add_bus(pdev, bus_id);
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}
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/**
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* omap_i2c_bus_setup - Process command line options for the I2C bus speed
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* @str: String of options
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*
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* This function allow to override the default I2C bus speed for given I2C
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* bus with a command line option.
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*
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* Format: i2c_bus=bus_id,clkrate (in kHz)
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*
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* Returns 1 on success, 0 otherwise.
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*/
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static int __init omap_i2c_bus_setup(char *str)
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{
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int ports;
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int ints[3];
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ports = omap_i2c_nr_ports();
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get_options(str, 3, ints);
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if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
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return 0;
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i2c_pdata[ints[1] - 1].clkrate = ints[2];
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i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
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return 1;
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}
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__setup("i2c_bus=", omap_i2c_bus_setup);
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/*
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* Register busses defined in command line but that are not registered with
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* omap_register_i2c_bus from board initialization code.
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*/
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static int __init omap_register_i2c_bus_cmdline(void)
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{
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int i, err = 0;
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for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
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if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
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i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
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err = omap_i2c_add_bus(i + 1);
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if (err)
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goto out;
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}
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out:
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return err;
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}
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subsys_initcall(omap_register_i2c_bus_cmdline);
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/**
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* omap_register_i2c_bus - register I2C bus with device descriptors
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* @bus_id: bus id counting from number 1
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* @clkrate: clock rate of the bus in kHz
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* @info: pointer into I2C device descriptor table or NULL
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* @len: number of descriptors in the table
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*
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* Returns 0 on success or an error code.
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*/
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int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len)
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{
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int err;
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BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
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if (info) {
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err = i2c_register_board_info(bus_id, info, len);
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if (err)
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return err;
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}
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if (!i2c_pdata[bus_id - 1].clkrate)
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i2c_pdata[bus_id - 1].clkrate = clkrate;
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i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
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return omap_i2c_add_bus(bus_id);
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}
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