mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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081860b970
This patch adds exception handling code, cpuinfo and mm-fault code. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
170 lines
3.3 KiB
C
170 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/user.h>
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#include <linux/string.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/ptrace.h>
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#include <linux/kallsyms.h>
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#include <linux/rtc.h>
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#include <linux/uaccess.h>
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#include <asm/setup.h>
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#include <asm/traps.h>
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#include <asm/pgalloc.h>
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#include <asm/siginfo.h>
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#include <asm/mmu_context.h>
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#ifdef CONFIG_CPU_HAS_FPU
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#include <abi/fpu.h>
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#endif
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/* Defined in entry.S */
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asmlinkage void csky_trap(void);
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asmlinkage void csky_systemcall(void);
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asmlinkage void csky_cmpxchg(void);
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asmlinkage void csky_get_tls(void);
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asmlinkage void csky_irq(void);
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asmlinkage void csky_tlbinvalidl(void);
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asmlinkage void csky_tlbinvalids(void);
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asmlinkage void csky_tlbmodified(void);
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/* Defined in head.S */
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asmlinkage void _start_smp_secondary(void);
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void __init pre_trap_init(void)
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{
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int i;
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mtcr("vbr", vec_base);
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for (i = 1; i < 128; i++)
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VEC_INIT(i, csky_trap);
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}
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void __init trap_init(void)
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{
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VEC_INIT(VEC_AUTOVEC, csky_irq);
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/* setup trap0 trap2 trap3 */
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VEC_INIT(VEC_TRAP0, csky_systemcall);
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VEC_INIT(VEC_TRAP2, csky_cmpxchg);
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VEC_INIT(VEC_TRAP3, csky_get_tls);
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/* setup MMU TLB exception */
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VEC_INIT(VEC_TLBINVALIDL, csky_tlbinvalidl);
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VEC_INIT(VEC_TLBINVALIDS, csky_tlbinvalids);
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VEC_INIT(VEC_TLBMODIFIED, csky_tlbmodified);
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#ifdef CONFIG_CPU_HAS_FPU
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init_fpu();
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#endif
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#ifdef CONFIG_SMP
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mtcr("cr<28, 0>", virt_to_phys(vec_base));
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VEC_INIT(VEC_RESET, (void *)virt_to_phys(_start_smp_secondary));
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#endif
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}
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void die_if_kernel(char *str, struct pt_regs *regs, int nr)
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{
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if (user_mode(regs))
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return;
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console_verbose();
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pr_err("%s: %08x\n", str, nr);
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show_regs(regs);
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add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
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do_exit(SIGSEGV);
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}
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void buserr(struct pt_regs *regs)
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{
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#ifdef CONFIG_CPU_CK810
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static unsigned long prev_pc;
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if ((regs->pc == prev_pc) && prev_pc != 0) {
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prev_pc = 0;
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} else {
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prev_pc = regs->pc;
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return;
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}
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#endif
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die_if_kernel("Kernel mode BUS error", regs, 0);
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pr_err("User mode Bus Error\n");
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show_regs(regs);
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current->thread.esp0 = (unsigned long) regs;
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force_sig_fault(SIGSEGV, 0, (void __user *)regs->pc, current);
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}
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#define USR_BKPT 0x1464
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asmlinkage void trap_c(struct pt_regs *regs)
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{
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int sig;
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unsigned long vector;
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siginfo_t info;
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vector = (mfcr("psr") >> 16) & 0xff;
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switch (vector) {
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case VEC_ZERODIV:
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sig = SIGFPE;
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break;
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/* ptrace */
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case VEC_TRACE:
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info.si_code = TRAP_TRACE;
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sig = SIGTRAP;
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break;
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case VEC_ILLEGAL:
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#ifndef CONFIG_CPU_NO_USER_BKPT
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if (*(uint16_t *)instruction_pointer(regs) != USR_BKPT)
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#endif
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{
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sig = SIGILL;
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break;
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}
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/* gdbserver breakpoint */
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case VEC_TRAP1:
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/* jtagserver breakpoint */
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case VEC_BREAKPOINT:
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info.si_code = TRAP_BRKPT;
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sig = SIGTRAP;
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break;
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case VEC_ACCESS:
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return buserr(regs);
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#ifdef CONFIG_CPU_NEED_SOFTALIGN
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case VEC_ALIGN:
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return csky_alignment(regs);
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#endif
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#ifdef CONFIG_CPU_HAS_FPU
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case VEC_FPE:
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return fpu_fpe(regs);
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case VEC_PRIV:
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if (fpu_libc_helper(regs))
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return;
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#endif
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default:
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sig = SIGSEGV;
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break;
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}
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send_sig(sig, current, 0);
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}
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asmlinkage void set_esp0(unsigned long ssp)
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{
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current->thread.esp0 = ssp;
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}
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