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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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fe31edc8a3
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
538 lines
15 KiB
C
538 lines
15 KiB
C
/*
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* VIA IDE driver for Linux. Supported southbridges:
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*
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* vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
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* vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
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* vt8235, vt8237, vt8237a
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*
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* Copyright (c) 2000-2002 Vojtech Pavlik
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* Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
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*
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* Based on the work of:
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* Michel Aubry
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* Jeff Garzik
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* Andre Hedrick
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*
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* Documentation:
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* Obsolete device documentation publicly available from via.com.tw
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* Current device documentation available under NDA only
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*/
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/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/ide.h>
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#include <linux/dmi.h>
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#ifdef CONFIG_PPC_CHRP
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#include <asm/processor.h>
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#endif
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#define DRV_NAME "via82cxxx"
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#define VIA_IDE_ENABLE 0x40
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#define VIA_IDE_CONFIG 0x41
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#define VIA_FIFO_CONFIG 0x43
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#define VIA_MISC_1 0x44
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#define VIA_MISC_2 0x45
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#define VIA_MISC_3 0x46
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#define VIA_DRIVE_TIMING 0x48
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#define VIA_8BIT_TIMING 0x4e
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#define VIA_ADDRESS_SETUP 0x4c
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#define VIA_UDMA_TIMING 0x50
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#define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
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#define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
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#define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
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#define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
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#define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
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#define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
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#define VIA_SATA_PATA 0x80 /* SATA/PATA combined configuration */
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enum {
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VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
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};
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/*
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* VIA SouthBridge chips.
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*/
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static struct via_isa_bridge {
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char *name;
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u16 id;
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u8 rev_min;
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u8 rev_max;
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u8 udma_mask;
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u8 flags;
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} via_isa_bridges[] = {
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{ "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
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{ "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
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{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
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{ "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
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{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
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{ "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
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{ "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
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{ "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
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{ "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
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{ "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
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{ "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
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{ "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
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{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
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{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
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{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
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{ "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ NULL }
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};
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static unsigned int via_clock;
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static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
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struct via82cxxx_dev
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{
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struct via_isa_bridge *via_config;
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unsigned int via_80w;
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};
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/**
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* via_set_speed - write timing registers
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* @dev: PCI device
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* @dn: device
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* @timing: IDE timing data to use
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*
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* via_set_speed writes timing values to the chipset registers
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*/
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static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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struct ide_host *host = pci_get_drvdata(dev);
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struct via82cxxx_dev *vdev = host->host_priv;
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u8 t;
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if (~vdev->via_config->flags & VIA_BAD_AST) {
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pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
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t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
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pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
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}
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pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
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((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
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pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
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((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
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switch (vdev->via_config->udma_mask) {
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case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
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case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
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case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
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case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
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}
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/* Set UDMA unless device is not UDMA capable */
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if (vdev->via_config->udma_mask) {
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u8 udma_etc;
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pci_read_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, &udma_etc);
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/* clear transfer mode bit */
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udma_etc &= ~0x20;
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if (timing->udma) {
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/* preserve 80-wire cable detection bit */
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udma_etc &= 0x10;
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udma_etc |= t;
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}
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pci_write_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, udma_etc);
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}
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}
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/**
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* via_set_drive - configure transfer mode
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* @hwif: port
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* @drive: Drive to set up
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*
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* via_set_drive() computes timing values configures the chipset to
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* a desired transfer mode. It also can be called by upper layers.
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*/
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static void via_set_drive(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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ide_drive_t *peer = ide_get_pair_dev(drive);
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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struct ide_host *host = pci_get_drvdata(dev);
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struct via82cxxx_dev *vdev = host->host_priv;
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struct ide_timing t, p;
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unsigned int T, UT;
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const u8 speed = drive->dma_mode;
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T = 1000000000 / via_clock;
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switch (vdev->via_config->udma_mask) {
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case ATA_UDMA2: UT = T; break;
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case ATA_UDMA4: UT = T/2; break;
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case ATA_UDMA5: UT = T/3; break;
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case ATA_UDMA6: UT = T/4; break;
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default: UT = T;
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}
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ide_timing_compute(drive, speed, &t, T, UT);
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if (peer) {
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ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
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ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
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}
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via_set_speed(hwif, drive->dn, &t);
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}
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/**
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* via_set_pio_mode - set host controller for PIO mode
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* @hwif: port
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* @drive: drive
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*
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* A callback from the upper layers for PIO-only tuning.
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*/
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static void via_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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drive->dma_mode = drive->pio_mode;
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via_set_drive(hwif, drive);
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}
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static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
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{
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struct via_isa_bridge *via_config;
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for (via_config = via_isa_bridges;
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via_config->id != PCI_DEVICE_ID_VIA_ANON; via_config++)
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if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
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!!(via_config->flags & VIA_BAD_ID),
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via_config->id, NULL))) {
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if ((*isa)->revision >= via_config->rev_min &&
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(*isa)->revision <= via_config->rev_max)
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break;
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pci_dev_put(*isa);
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}
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return via_config;
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}
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/*
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* Check and handle 80-wire cable presence
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*/
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static void via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
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{
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int i;
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switch (vdev->via_config->udma_mask) {
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case ATA_UDMA4:
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for (i = 24; i >= 0; i -= 8)
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if (((u >> (i & 16)) & 8) &&
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((u >> i) & 0x20) &&
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(((u >> i) & 7) < 2)) {
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/*
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* 2x PCI clock and
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* UDMA w/ < 3T/cycle
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*/
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vdev->via_80w |= (1 << (1 - (i >> 4)));
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}
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break;
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case ATA_UDMA5:
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for (i = 24; i >= 0; i -= 8)
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if (((u >> i) & 0x10) ||
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(((u >> i) & 0x20) &&
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(((u >> i) & 7) < 4))) {
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/* BIOS 80-wire bit or
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* UDMA w/ < 60ns/cycle
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*/
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vdev->via_80w |= (1 << (1 - (i >> 4)));
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}
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break;
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case ATA_UDMA6:
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for (i = 24; i >= 0; i -= 8)
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if (((u >> i) & 0x10) ||
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(((u >> i) & 0x20) &&
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(((u >> i) & 7) < 6))) {
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/* BIOS 80-wire bit or
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* UDMA w/ < 60ns/cycle
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*/
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vdev->via_80w |= (1 << (1 - (i >> 4)));
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}
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break;
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}
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}
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/**
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* init_chipset_via82cxxx - initialization handler
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* @dev: PCI device
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*
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* The initialization callback. Here we determine the IDE chip type
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* and initialize its drive independent registers.
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*/
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static int init_chipset_via82cxxx(struct pci_dev *dev)
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{
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struct ide_host *host = pci_get_drvdata(dev);
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struct via82cxxx_dev *vdev = host->host_priv;
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struct via_isa_bridge *via_config = vdev->via_config;
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u8 t, v;
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u32 u;
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/*
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* Detect cable and configure Clk66
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*/
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pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
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via_cable_detect(vdev, u);
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if (via_config->udma_mask == ATA_UDMA4) {
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/* Enable Clk66 */
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pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
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} else if (via_config->flags & VIA_BAD_CLK66) {
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/* Would cause trouble on 596a and 686 */
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pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
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}
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/*
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* Check whether interfaces are enabled.
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*/
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pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
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/*
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* Set up FIFO sizes and thresholds.
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*/
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pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
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/* Disable PREQ# till DDACK# */
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if (via_config->flags & VIA_BAD_PREQ) {
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/* Would crash on 586b rev 41 */
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t &= 0x7f;
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}
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/* Fix FIFO split between channels */
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if (via_config->flags & VIA_SET_FIFO) {
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t &= (t & 0x9f);
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switch (v & 3) {
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case 2: t |= 0x00; break; /* 16 on primary */
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case 1: t |= 0x60; break; /* 16 on secondary */
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case 3: t |= 0x20; break; /* 8 pri 8 sec */
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}
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}
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pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
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return 0;
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}
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/*
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* Cable special cases
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*/
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static const struct dmi_system_id cable_dmi_table[] = {
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{
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.ident = "Acer Ferrari 3400",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
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DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
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},
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},
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{ }
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};
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static int via_cable_override(struct pci_dev *pdev)
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{
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/* Systems by DMI */
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if (dmi_check_system(cable_dmi_table))
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return 1;
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/* Arima W730-K8/Targa Visionary 811/... */
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if (pdev->subsystem_vendor == 0x161F &&
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pdev->subsystem_device == 0x2032)
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return 1;
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return 0;
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}
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static u8 via82cxxx_cable_detect(ide_hwif_t *hwif)
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{
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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struct ide_host *host = pci_get_drvdata(pdev);
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struct via82cxxx_dev *vdev = host->host_priv;
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if (via_cable_override(pdev))
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return ATA_CBL_PATA40_SHORT;
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if ((vdev->via_config->flags & VIA_SATA_PATA) && hwif->channel == 0)
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return ATA_CBL_SATA;
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if ((vdev->via_80w >> hwif->channel) & 1)
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return ATA_CBL_PATA80;
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else
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return ATA_CBL_PATA40;
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}
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static const struct ide_port_ops via_port_ops = {
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.set_pio_mode = via_set_pio_mode,
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.set_dma_mode = via_set_drive,
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.cable_detect = via82cxxx_cable_detect,
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};
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static const struct ide_port_info via82cxxx_chipset = {
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.name = DRV_NAME,
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.init_chipset = init_chipset_via82cxxx,
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.enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
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.port_ops = &via_port_ops,
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.host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
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IDE_HFLAG_POST_SET_MODE |
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IDE_HFLAG_IO_32BIT,
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.pio_mask = ATA_PIO5,
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.swdma_mask = ATA_SWDMA2,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
};
|
|
|
|
static int via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
|
{
|
|
struct pci_dev *isa = NULL;
|
|
struct via_isa_bridge *via_config;
|
|
struct via82cxxx_dev *vdev;
|
|
int rc;
|
|
u8 idx = id->driver_data;
|
|
struct ide_port_info d;
|
|
|
|
d = via82cxxx_chipset;
|
|
|
|
/*
|
|
* Find the ISA bridge and check we know what it is.
|
|
*/
|
|
via_config = via_config_find(&isa);
|
|
|
|
/*
|
|
* Print the boot message.
|
|
*/
|
|
printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
|
|
pci_name(dev), via_config->name, isa->revision,
|
|
via_config->udma_mask ? "U" : "MW",
|
|
via_dma[via_config->udma_mask ?
|
|
(fls(via_config->udma_mask) - 1) : 0]);
|
|
|
|
pci_dev_put(isa);
|
|
|
|
/*
|
|
* Determine system bus clock.
|
|
*/
|
|
via_clock = (ide_pci_clk ? ide_pci_clk : 33) * 1000;
|
|
|
|
switch (via_clock) {
|
|
case 33000: via_clock = 33333; break;
|
|
case 37000: via_clock = 37500; break;
|
|
case 41000: via_clock = 41666; break;
|
|
}
|
|
|
|
if (via_clock < 20000 || via_clock > 50000) {
|
|
printk(KERN_WARNING DRV_NAME ": User given PCI clock speed "
|
|
"impossible (%d), using 33 MHz instead.\n", via_clock);
|
|
via_clock = 33333;
|
|
}
|
|
|
|
if (idx == 1)
|
|
d.enablebits[1].reg = d.enablebits[0].reg = 0;
|
|
else
|
|
d.host_flags |= IDE_HFLAG_NO_AUTODMA;
|
|
|
|
if (idx == VIA_IDFLAG_SINGLE)
|
|
d.host_flags |= IDE_HFLAG_SINGLE;
|
|
|
|
if ((via_config->flags & VIA_NO_UNMASK) == 0)
|
|
d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
|
|
|
|
d.udma_mask = via_config->udma_mask;
|
|
|
|
vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
|
|
if (!vdev) {
|
|
printk(KERN_ERR DRV_NAME " %s: out of memory :(\n",
|
|
pci_name(dev));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
vdev->via_config = via_config;
|
|
|
|
rc = ide_pci_init_one(dev, &d, vdev);
|
|
if (rc)
|
|
kfree(vdev);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void via_remove(struct pci_dev *dev)
|
|
{
|
|
struct ide_host *host = pci_get_drvdata(dev);
|
|
struct via82cxxx_dev *vdev = host->host_priv;
|
|
|
|
ide_pci_remove(dev);
|
|
kfree(vdev);
|
|
}
|
|
|
|
static const struct pci_device_id via_pci_tbl[] = {
|
|
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 },
|
|
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 },
|
|
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
|
|
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_VX855_IDE), VIA_IDFLAG_SINGLE },
|
|
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 },
|
|
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6415), 1 },
|
|
{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
|
|
{ 0, },
|
|
};
|
|
MODULE_DEVICE_TABLE(pci, via_pci_tbl);
|
|
|
|
static struct pci_driver via_pci_driver = {
|
|
.name = "VIA_IDE",
|
|
.id_table = via_pci_tbl,
|
|
.probe = via_init_one,
|
|
.remove = via_remove,
|
|
.suspend = ide_pci_suspend,
|
|
.resume = ide_pci_resume,
|
|
};
|
|
|
|
static int __init via_ide_init(void)
|
|
{
|
|
return ide_pci_register_driver(&via_pci_driver);
|
|
}
|
|
|
|
static void __exit via_ide_exit(void)
|
|
{
|
|
pci_unregister_driver(&via_pci_driver);
|
|
}
|
|
|
|
module_init(via_ide_init);
|
|
module_exit(via_ide_exit);
|
|
|
|
MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz, Michel Aubry, Jeff Garzik, Andre Hedrick");
|
|
MODULE_DESCRIPTION("PCI driver module for VIA IDE");
|
|
MODULE_LICENSE("GPL");
|