mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ed50a0890e
The functions fsi_slave_report_and_clear_errors and fsi_slave_handle_error are local to the source and do not need to be in global scope, so make them static. Cleans up sparse warnings: symbol 'fsi_slave_report_and_clear_errors' was not declared. Should it be static? symbol 'fsi_slave_handle_error' was not declared. Should it be static? Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
900 lines
21 KiB
C
900 lines
21 KiB
C
/*
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* FSI core driver
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*
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* Copyright (C) IBM Corporation 2016
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/crc4.h>
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#include <linux/device.h>
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#include <linux/fsi.h>
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#include <linux/idr.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/bitops.h>
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#include "fsi-master.h"
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#define CREATE_TRACE_POINTS
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#include <trace/events/fsi.h>
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#define FSI_SLAVE_CONF_NEXT_MASK GENMASK(31, 31)
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#define FSI_SLAVE_CONF_SLOTS_MASK GENMASK(23, 16)
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#define FSI_SLAVE_CONF_SLOTS_SHIFT 16
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#define FSI_SLAVE_CONF_VERSION_MASK GENMASK(15, 12)
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#define FSI_SLAVE_CONF_VERSION_SHIFT 12
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#define FSI_SLAVE_CONF_TYPE_MASK GENMASK(11, 4)
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#define FSI_SLAVE_CONF_TYPE_SHIFT 4
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#define FSI_SLAVE_CONF_CRC_SHIFT 4
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#define FSI_SLAVE_CONF_CRC_MASK GENMASK(3, 0)
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#define FSI_SLAVE_CONF_DATA_BITS 28
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#define FSI_PEEK_BASE 0x410
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static const int engine_page_size = 0x400;
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#define FSI_SLAVE_BASE 0x800
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/*
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* FSI slave engine control register offsets
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*/
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#define FSI_SMODE 0x0 /* R/W: Mode register */
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#define FSI_SISC 0x8 /* R/W: Interrupt condition */
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#define FSI_SSTAT 0x14 /* R : Slave status */
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#define FSI_LLMODE 0x100 /* R/W: Link layer mode register */
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/*
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* SMODE fields
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*/
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#define FSI_SMODE_WSC 0x80000000 /* Warm start done */
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#define FSI_SMODE_ECRC 0x20000000 /* Hw CRC check */
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#define FSI_SMODE_SID_SHIFT 24 /* ID shift */
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#define FSI_SMODE_SID_MASK 3 /* ID Mask */
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#define FSI_SMODE_ED_SHIFT 20 /* Echo delay shift */
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#define FSI_SMODE_ED_MASK 0xf /* Echo delay mask */
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#define FSI_SMODE_SD_SHIFT 16 /* Send delay shift */
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#define FSI_SMODE_SD_MASK 0xf /* Send delay mask */
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#define FSI_SMODE_LBCRR_SHIFT 8 /* Clk ratio shift */
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#define FSI_SMODE_LBCRR_MASK 0xf /* Clk ratio mask */
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/*
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* LLMODE fields
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*/
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#define FSI_LLMODE_ASYNC 0x1
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#define FSI_SLAVE_SIZE_23b 0x800000
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static DEFINE_IDA(master_ida);
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struct fsi_slave {
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struct device dev;
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struct fsi_master *master;
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int id;
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int link;
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uint32_t size; /* size of slave address space */
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};
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#define to_fsi_master(d) container_of(d, struct fsi_master, dev)
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#define to_fsi_slave(d) container_of(d, struct fsi_slave, dev)
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static const int slave_retries = 2;
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static int discard_errors;
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static int fsi_master_read(struct fsi_master *master, int link,
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uint8_t slave_id, uint32_t addr, void *val, size_t size);
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static int fsi_master_write(struct fsi_master *master, int link,
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uint8_t slave_id, uint32_t addr, const void *val, size_t size);
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static int fsi_master_break(struct fsi_master *master, int link);
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/*
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* fsi_device_read() / fsi_device_write() / fsi_device_peek()
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*
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* FSI endpoint-device support
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*
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* Read / write / peek accessors for a client
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*
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* Parameters:
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* dev: Structure passed to FSI client device drivers on probe().
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* addr: FSI address of given device. Client should pass in its base address
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* plus desired offset to access its register space.
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* val: For read/peek this is the value read at the specified address. For
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* write this is value to write to the specified address.
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* The data in val must be FSI bus endian (big endian).
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* size: Size in bytes of the operation. Sizes supported are 1, 2 and 4 bytes.
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* Addresses must be aligned on size boundaries or an error will result.
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*/
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int fsi_device_read(struct fsi_device *dev, uint32_t addr, void *val,
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size_t size)
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{
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if (addr > dev->size || size > dev->size || addr > dev->size - size)
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return -EINVAL;
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return fsi_slave_read(dev->slave, dev->addr + addr, val, size);
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}
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EXPORT_SYMBOL_GPL(fsi_device_read);
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int fsi_device_write(struct fsi_device *dev, uint32_t addr, const void *val,
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size_t size)
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{
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if (addr > dev->size || size > dev->size || addr > dev->size - size)
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return -EINVAL;
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return fsi_slave_write(dev->slave, dev->addr + addr, val, size);
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}
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EXPORT_SYMBOL_GPL(fsi_device_write);
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int fsi_device_peek(struct fsi_device *dev, void *val)
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{
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uint32_t addr = FSI_PEEK_BASE + ((dev->unit - 2) * sizeof(uint32_t));
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return fsi_slave_read(dev->slave, addr, val, sizeof(uint32_t));
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}
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static void fsi_device_release(struct device *_device)
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{
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struct fsi_device *device = to_fsi_dev(_device);
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kfree(device);
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}
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static struct fsi_device *fsi_create_device(struct fsi_slave *slave)
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{
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struct fsi_device *dev;
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return NULL;
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dev->dev.parent = &slave->dev;
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dev->dev.bus = &fsi_bus_type;
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dev->dev.release = fsi_device_release;
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return dev;
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}
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/* FSI slave support */
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static int fsi_slave_calc_addr(struct fsi_slave *slave, uint32_t *addrp,
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uint8_t *idp)
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{
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uint32_t addr = *addrp;
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uint8_t id = *idp;
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if (addr > slave->size)
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return -EINVAL;
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/* For 23 bit addressing, we encode the extra two bits in the slave
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* id (and the slave's actual ID needs to be 0).
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*/
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if (addr > 0x1fffff) {
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if (slave->id != 0)
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return -EINVAL;
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id = (addr >> 21) & 0x3;
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addr &= 0x1fffff;
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}
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*addrp = addr;
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*idp = id;
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return 0;
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}
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static int fsi_slave_report_and_clear_errors(struct fsi_slave *slave)
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{
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struct fsi_master *master = slave->master;
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uint32_t irq, stat;
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int rc, link;
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uint8_t id;
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link = slave->link;
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id = slave->id;
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rc = fsi_master_read(master, link, id, FSI_SLAVE_BASE + FSI_SISC,
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&irq, sizeof(irq));
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if (rc)
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return rc;
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rc = fsi_master_read(master, link, id, FSI_SLAVE_BASE + FSI_SSTAT,
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&stat, sizeof(stat));
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if (rc)
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return rc;
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dev_info(&slave->dev, "status: 0x%08x, sisc: 0x%08x\n",
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be32_to_cpu(stat), be32_to_cpu(irq));
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/* clear interrupts */
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return fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SISC,
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&irq, sizeof(irq));
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}
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static int fsi_slave_set_smode(struct fsi_master *master, int link, int id);
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static int fsi_slave_handle_error(struct fsi_slave *slave, bool write,
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uint32_t addr, size_t size)
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{
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struct fsi_master *master = slave->master;
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int rc, link;
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uint32_t reg;
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uint8_t id;
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if (discard_errors)
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return -1;
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link = slave->link;
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id = slave->id;
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dev_dbg(&slave->dev, "handling error on %s to 0x%08x[%zd]",
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write ? "write" : "read", addr, size);
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/* try a simple clear of error conditions, which may fail if we've lost
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* communication with the slave
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*/
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rc = fsi_slave_report_and_clear_errors(slave);
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if (!rc)
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return 0;
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/* send a TERM and retry */
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if (master->term) {
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rc = master->term(master, link, id);
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if (!rc) {
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rc = fsi_master_read(master, link, id, 0,
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®, sizeof(reg));
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if (!rc)
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rc = fsi_slave_report_and_clear_errors(slave);
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if (!rc)
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return 0;
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}
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}
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/* getting serious, reset the slave via BREAK */
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rc = fsi_master_break(master, link);
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if (rc)
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return rc;
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rc = fsi_slave_set_smode(master, link, id);
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if (rc)
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return rc;
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return fsi_slave_report_and_clear_errors(slave);
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}
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int fsi_slave_read(struct fsi_slave *slave, uint32_t addr,
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void *val, size_t size)
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{
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uint8_t id = slave->id;
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int rc, err_rc, i;
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rc = fsi_slave_calc_addr(slave, &addr, &id);
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if (rc)
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return rc;
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for (i = 0; i < slave_retries; i++) {
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rc = fsi_master_read(slave->master, slave->link,
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id, addr, val, size);
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if (!rc)
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break;
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err_rc = fsi_slave_handle_error(slave, false, addr, size);
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if (err_rc)
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break;
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}
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return rc;
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}
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EXPORT_SYMBOL_GPL(fsi_slave_read);
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int fsi_slave_write(struct fsi_slave *slave, uint32_t addr,
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const void *val, size_t size)
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{
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uint8_t id = slave->id;
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int rc, err_rc, i;
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rc = fsi_slave_calc_addr(slave, &addr, &id);
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if (rc)
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return rc;
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for (i = 0; i < slave_retries; i++) {
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rc = fsi_master_write(slave->master, slave->link,
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id, addr, val, size);
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if (!rc)
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break;
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err_rc = fsi_slave_handle_error(slave, true, addr, size);
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if (err_rc)
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break;
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}
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return rc;
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}
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EXPORT_SYMBOL_GPL(fsi_slave_write);
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extern int fsi_slave_claim_range(struct fsi_slave *slave,
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uint32_t addr, uint32_t size)
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{
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if (addr + size < addr)
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return -EINVAL;
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if (addr + size > slave->size)
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return -EINVAL;
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/* todo: check for overlapping claims */
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return 0;
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}
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EXPORT_SYMBOL_GPL(fsi_slave_claim_range);
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extern void fsi_slave_release_range(struct fsi_slave *slave,
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uint32_t addr, uint32_t size)
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{
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}
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EXPORT_SYMBOL_GPL(fsi_slave_release_range);
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static int fsi_slave_scan(struct fsi_slave *slave)
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{
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uint32_t engine_addr;
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uint32_t conf;
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int rc, i;
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/*
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* scan engines
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*
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* We keep the peek mode and slave engines for the core; so start
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* at the third slot in the configuration table. We also need to
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* skip the chip ID entry at the start of the address space.
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*/
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engine_addr = engine_page_size * 3;
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for (i = 2; i < engine_page_size / sizeof(uint32_t); i++) {
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uint8_t slots, version, type, crc;
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struct fsi_device *dev;
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rc = fsi_slave_read(slave, (i + 1) * sizeof(conf),
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&conf, sizeof(conf));
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if (rc) {
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dev_warn(&slave->dev,
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"error reading slave registers\n");
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return -1;
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}
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conf = be32_to_cpu(conf);
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crc = crc4(0, conf, 32);
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if (crc) {
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dev_warn(&slave->dev,
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"crc error in slave register at 0x%04x\n",
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i);
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return -1;
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}
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slots = (conf & FSI_SLAVE_CONF_SLOTS_MASK)
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>> FSI_SLAVE_CONF_SLOTS_SHIFT;
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version = (conf & FSI_SLAVE_CONF_VERSION_MASK)
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>> FSI_SLAVE_CONF_VERSION_SHIFT;
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type = (conf & FSI_SLAVE_CONF_TYPE_MASK)
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>> FSI_SLAVE_CONF_TYPE_SHIFT;
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/*
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* Unused address areas are marked by a zero type value; this
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* skips the defined address areas
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*/
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if (type != 0 && slots != 0) {
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/* create device */
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dev = fsi_create_device(slave);
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if (!dev)
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return -ENOMEM;
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dev->slave = slave;
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dev->engine_type = type;
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dev->version = version;
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dev->unit = i;
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dev->addr = engine_addr;
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dev->size = slots * engine_page_size;
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dev_dbg(&slave->dev,
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"engine[%i]: type %x, version %x, addr %x size %x\n",
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dev->unit, dev->engine_type, version,
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dev->addr, dev->size);
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dev_set_name(&dev->dev, "%02x:%02x:%02x:%02x",
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slave->master->idx, slave->link,
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slave->id, i - 2);
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rc = device_register(&dev->dev);
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if (rc) {
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dev_warn(&slave->dev, "add failed: %d\n", rc);
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put_device(&dev->dev);
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}
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}
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engine_addr += slots * engine_page_size;
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if (!(conf & FSI_SLAVE_CONF_NEXT_MASK))
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break;
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}
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return 0;
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}
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static ssize_t fsi_slave_sysfs_raw_read(struct file *file,
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struct kobject *kobj, struct bin_attribute *attr, char *buf,
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loff_t off, size_t count)
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{
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struct fsi_slave *slave = to_fsi_slave(kobj_to_dev(kobj));
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size_t total_len, read_len;
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int rc;
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if (off < 0)
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return -EINVAL;
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if (off > 0xffffffff || count > 0xffffffff || off + count > 0xffffffff)
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return -EINVAL;
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for (total_len = 0; total_len < count; total_len += read_len) {
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read_len = min_t(size_t, count, 4);
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read_len -= off & 0x3;
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rc = fsi_slave_read(slave, off, buf + total_len, read_len);
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if (rc)
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return rc;
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off += read_len;
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}
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return count;
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}
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static ssize_t fsi_slave_sysfs_raw_write(struct file *file,
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struct kobject *kobj, struct bin_attribute *attr,
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char *buf, loff_t off, size_t count)
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{
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struct fsi_slave *slave = to_fsi_slave(kobj_to_dev(kobj));
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size_t total_len, write_len;
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int rc;
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if (off < 0)
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return -EINVAL;
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if (off > 0xffffffff || count > 0xffffffff || off + count > 0xffffffff)
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return -EINVAL;
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for (total_len = 0; total_len < count; total_len += write_len) {
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write_len = min_t(size_t, count, 4);
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write_len -= off & 0x3;
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rc = fsi_slave_write(slave, off, buf + total_len, write_len);
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if (rc)
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return rc;
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off += write_len;
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}
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return count;
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}
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static const struct bin_attribute fsi_slave_raw_attr = {
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.attr = {
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.name = "raw",
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.mode = 0600,
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},
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.size = 0,
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.read = fsi_slave_sysfs_raw_read,
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.write = fsi_slave_sysfs_raw_write,
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};
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static ssize_t fsi_slave_sysfs_term_write(struct file *file,
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struct kobject *kobj, struct bin_attribute *attr,
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char *buf, loff_t off, size_t count)
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{
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struct fsi_slave *slave = to_fsi_slave(kobj_to_dev(kobj));
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struct fsi_master *master = slave->master;
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if (!master->term)
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return -ENODEV;
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master->term(master, slave->link, slave->id);
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return count;
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}
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static const struct bin_attribute fsi_slave_term_attr = {
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.attr = {
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.name = "term",
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.mode = 0200,
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},
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.size = 0,
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.write = fsi_slave_sysfs_term_write,
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};
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/* Encode slave local bus echo delay */
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|
static inline uint32_t fsi_smode_echodly(int x)
|
|
{
|
|
return (x & FSI_SMODE_ED_MASK) << FSI_SMODE_ED_SHIFT;
|
|
}
|
|
|
|
/* Encode slave local bus send delay */
|
|
static inline uint32_t fsi_smode_senddly(int x)
|
|
{
|
|
return (x & FSI_SMODE_SD_MASK) << FSI_SMODE_SD_SHIFT;
|
|
}
|
|
|
|
/* Encode slave local bus clock rate ratio */
|
|
static inline uint32_t fsi_smode_lbcrr(int x)
|
|
{
|
|
return (x & FSI_SMODE_LBCRR_MASK) << FSI_SMODE_LBCRR_SHIFT;
|
|
}
|
|
|
|
/* Encode slave ID */
|
|
static inline uint32_t fsi_smode_sid(int x)
|
|
{
|
|
return (x & FSI_SMODE_SID_MASK) << FSI_SMODE_SID_SHIFT;
|
|
}
|
|
|
|
static uint32_t fsi_slave_smode(int id)
|
|
{
|
|
return FSI_SMODE_WSC | FSI_SMODE_ECRC
|
|
| fsi_smode_sid(id)
|
|
| fsi_smode_echodly(0xf) | fsi_smode_senddly(0xf)
|
|
| fsi_smode_lbcrr(0x8);
|
|
}
|
|
|
|
static int fsi_slave_set_smode(struct fsi_master *master, int link, int id)
|
|
{
|
|
uint32_t smode;
|
|
|
|
/* set our smode register with the slave ID field to 0; this enables
|
|
* extended slave addressing
|
|
*/
|
|
smode = fsi_slave_smode(id);
|
|
smode = cpu_to_be32(smode);
|
|
|
|
return fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SMODE,
|
|
&smode, sizeof(smode));
|
|
}
|
|
|
|
static void fsi_slave_release(struct device *dev)
|
|
{
|
|
struct fsi_slave *slave = to_fsi_slave(dev);
|
|
|
|
kfree(slave);
|
|
}
|
|
|
|
static int fsi_slave_init(struct fsi_master *master, int link, uint8_t id)
|
|
{
|
|
uint32_t chip_id, llmode;
|
|
struct fsi_slave *slave;
|
|
uint8_t crc;
|
|
int rc;
|
|
|
|
/* Currently, we only support single slaves on a link, and use the
|
|
* full 23-bit address range
|
|
*/
|
|
if (id != 0)
|
|
return -EINVAL;
|
|
|
|
rc = fsi_master_read(master, link, id, 0, &chip_id, sizeof(chip_id));
|
|
if (rc) {
|
|
dev_dbg(&master->dev, "can't read slave %02x:%02x %d\n",
|
|
link, id, rc);
|
|
return -ENODEV;
|
|
}
|
|
chip_id = be32_to_cpu(chip_id);
|
|
|
|
crc = crc4(0, chip_id, 32);
|
|
if (crc) {
|
|
dev_warn(&master->dev, "slave %02x:%02x invalid chip id CRC!\n",
|
|
link, id);
|
|
return -EIO;
|
|
}
|
|
|
|
dev_info(&master->dev, "fsi: found chip %08x at %02x:%02x:%02x\n",
|
|
chip_id, master->idx, link, id);
|
|
|
|
rc = fsi_slave_set_smode(master, link, id);
|
|
if (rc) {
|
|
dev_warn(&master->dev,
|
|
"can't set smode on slave:%02x:%02x %d\n",
|
|
link, id, rc);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* If we're behind a master that doesn't provide a self-running bus
|
|
* clock, put the slave into async mode
|
|
*/
|
|
if (master->flags & FSI_MASTER_FLAG_SWCLOCK) {
|
|
llmode = cpu_to_be32(FSI_LLMODE_ASYNC);
|
|
rc = fsi_master_write(master, link, id,
|
|
FSI_SLAVE_BASE + FSI_LLMODE,
|
|
&llmode, sizeof(llmode));
|
|
if (rc)
|
|
dev_warn(&master->dev,
|
|
"can't set llmode on slave:%02x:%02x %d\n",
|
|
link, id, rc);
|
|
}
|
|
|
|
/* We can communicate with a slave; create the slave device and
|
|
* register.
|
|
*/
|
|
slave = kzalloc(sizeof(*slave), GFP_KERNEL);
|
|
if (!slave)
|
|
return -ENOMEM;
|
|
|
|
slave->master = master;
|
|
slave->dev.parent = &master->dev;
|
|
slave->dev.release = fsi_slave_release;
|
|
slave->link = link;
|
|
slave->id = id;
|
|
slave->size = FSI_SLAVE_SIZE_23b;
|
|
|
|
dev_set_name(&slave->dev, "slave@%02x:%02x", link, id);
|
|
rc = device_register(&slave->dev);
|
|
if (rc < 0) {
|
|
dev_warn(&master->dev, "failed to create slave device: %d\n",
|
|
rc);
|
|
put_device(&slave->dev);
|
|
return rc;
|
|
}
|
|
|
|
rc = device_create_bin_file(&slave->dev, &fsi_slave_raw_attr);
|
|
if (rc)
|
|
dev_warn(&slave->dev, "failed to create raw attr: %d\n", rc);
|
|
|
|
rc = device_create_bin_file(&slave->dev, &fsi_slave_term_attr);
|
|
if (rc)
|
|
dev_warn(&slave->dev, "failed to create term attr: %d\n", rc);
|
|
|
|
rc = fsi_slave_scan(slave);
|
|
if (rc)
|
|
dev_dbg(&master->dev, "failed during slave scan with: %d\n",
|
|
rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
/* FSI master support */
|
|
static int fsi_check_access(uint32_t addr, size_t size)
|
|
{
|
|
if (size != 1 && size != 2 && size != 4)
|
|
return -EINVAL;
|
|
|
|
if ((addr & 0x3) != (size & 0x3))
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int fsi_master_read(struct fsi_master *master, int link,
|
|
uint8_t slave_id, uint32_t addr, void *val, size_t size)
|
|
{
|
|
int rc;
|
|
|
|
trace_fsi_master_read(master, link, slave_id, addr, size);
|
|
|
|
rc = fsi_check_access(addr, size);
|
|
if (!rc)
|
|
rc = master->read(master, link, slave_id, addr, val, size);
|
|
|
|
trace_fsi_master_rw_result(master, link, slave_id, addr, size,
|
|
false, val, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int fsi_master_write(struct fsi_master *master, int link,
|
|
uint8_t slave_id, uint32_t addr, const void *val, size_t size)
|
|
{
|
|
int rc;
|
|
|
|
trace_fsi_master_write(master, link, slave_id, addr, size, val);
|
|
|
|
rc = fsi_check_access(addr, size);
|
|
if (!rc)
|
|
rc = master->write(master, link, slave_id, addr, val, size);
|
|
|
|
trace_fsi_master_rw_result(master, link, slave_id, addr, size,
|
|
true, val, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int fsi_master_link_enable(struct fsi_master *master, int link)
|
|
{
|
|
if (master->link_enable)
|
|
return master->link_enable(master, link);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Issue a break command on this link
|
|
*/
|
|
static int fsi_master_break(struct fsi_master *master, int link)
|
|
{
|
|
trace_fsi_master_break(master, link);
|
|
|
|
if (master->send_break)
|
|
return master->send_break(master, link);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int fsi_master_scan(struct fsi_master *master)
|
|
{
|
|
int link, rc;
|
|
|
|
for (link = 0; link < master->n_links; link++) {
|
|
rc = fsi_master_link_enable(master, link);
|
|
if (rc) {
|
|
dev_dbg(&master->dev,
|
|
"enable link %d failed: %d\n", link, rc);
|
|
continue;
|
|
}
|
|
rc = fsi_master_break(master, link);
|
|
if (rc) {
|
|
dev_dbg(&master->dev,
|
|
"break to link %d failed: %d\n", link, rc);
|
|
continue;
|
|
}
|
|
|
|
fsi_slave_init(master, link, 0);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int fsi_slave_remove_device(struct device *dev, void *arg)
|
|
{
|
|
device_unregister(dev);
|
|
return 0;
|
|
}
|
|
|
|
static int fsi_master_remove_slave(struct device *dev, void *arg)
|
|
{
|
|
device_for_each_child(dev, NULL, fsi_slave_remove_device);
|
|
device_unregister(dev);
|
|
return 0;
|
|
}
|
|
|
|
static void fsi_master_unscan(struct fsi_master *master)
|
|
{
|
|
device_for_each_child(&master->dev, NULL, fsi_master_remove_slave);
|
|
}
|
|
|
|
static ssize_t master_rescan_store(struct device *dev,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
struct fsi_master *master = to_fsi_master(dev);
|
|
int rc;
|
|
|
|
fsi_master_unscan(master);
|
|
rc = fsi_master_scan(master);
|
|
if (rc < 0)
|
|
return rc;
|
|
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR(rescan, 0200, NULL, master_rescan_store);
|
|
|
|
static ssize_t master_break_store(struct device *dev,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
struct fsi_master *master = to_fsi_master(dev);
|
|
|
|
fsi_master_break(master, 0);
|
|
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR(break, 0200, NULL, master_break_store);
|
|
|
|
int fsi_master_register(struct fsi_master *master)
|
|
{
|
|
int rc;
|
|
|
|
if (!master)
|
|
return -EINVAL;
|
|
|
|
master->idx = ida_simple_get(&master_ida, 0, INT_MAX, GFP_KERNEL);
|
|
dev_set_name(&master->dev, "fsi%d", master->idx);
|
|
|
|
rc = device_register(&master->dev);
|
|
if (rc) {
|
|
ida_simple_remove(&master_ida, master->idx);
|
|
return rc;
|
|
}
|
|
|
|
rc = device_create_file(&master->dev, &dev_attr_rescan);
|
|
if (rc) {
|
|
device_unregister(&master->dev);
|
|
ida_simple_remove(&master_ida, master->idx);
|
|
return rc;
|
|
}
|
|
|
|
rc = device_create_file(&master->dev, &dev_attr_break);
|
|
if (rc) {
|
|
device_unregister(&master->dev);
|
|
ida_simple_remove(&master_ida, master->idx);
|
|
return rc;
|
|
}
|
|
|
|
fsi_master_scan(master);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(fsi_master_register);
|
|
|
|
void fsi_master_unregister(struct fsi_master *master)
|
|
{
|
|
if (master->idx >= 0) {
|
|
ida_simple_remove(&master_ida, master->idx);
|
|
master->idx = -1;
|
|
}
|
|
|
|
fsi_master_unscan(master);
|
|
device_unregister(&master->dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(fsi_master_unregister);
|
|
|
|
/* FSI core & Linux bus type definitions */
|
|
|
|
static int fsi_bus_match(struct device *dev, struct device_driver *drv)
|
|
{
|
|
struct fsi_device *fsi_dev = to_fsi_dev(dev);
|
|
struct fsi_driver *fsi_drv = to_fsi_drv(drv);
|
|
const struct fsi_device_id *id;
|
|
|
|
if (!fsi_drv->id_table)
|
|
return 0;
|
|
|
|
for (id = fsi_drv->id_table; id->engine_type; id++) {
|
|
if (id->engine_type != fsi_dev->engine_type)
|
|
continue;
|
|
if (id->version == FSI_VERSION_ANY ||
|
|
id->version == fsi_dev->version)
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int fsi_driver_register(struct fsi_driver *fsi_drv)
|
|
{
|
|
if (!fsi_drv)
|
|
return -EINVAL;
|
|
if (!fsi_drv->id_table)
|
|
return -EINVAL;
|
|
|
|
return driver_register(&fsi_drv->drv);
|
|
}
|
|
EXPORT_SYMBOL_GPL(fsi_driver_register);
|
|
|
|
void fsi_driver_unregister(struct fsi_driver *fsi_drv)
|
|
{
|
|
driver_unregister(&fsi_drv->drv);
|
|
}
|
|
EXPORT_SYMBOL_GPL(fsi_driver_unregister);
|
|
|
|
struct bus_type fsi_bus_type = {
|
|
.name = "fsi",
|
|
.match = fsi_bus_match,
|
|
};
|
|
EXPORT_SYMBOL_GPL(fsi_bus_type);
|
|
|
|
static int __init fsi_init(void)
|
|
{
|
|
return bus_register(&fsi_bus_type);
|
|
}
|
|
postcore_initcall(fsi_init);
|
|
|
|
static void fsi_exit(void)
|
|
{
|
|
bus_unregister(&fsi_bus_type);
|
|
}
|
|
module_exit(fsi_exit);
|
|
module_param(discard_errors, int, 0664);
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_PARM_DESC(discard_errors, "Don't invoke error handling on bus accesses");
|