mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d591fdf8e2
Expose Tegra chip ID and revision in /sys/devices/soc for user mode usage Signed-off-by: Danny Huang <dahuang@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
187 lines
4.6 KiB
C
187 lines
4.6 KiB
C
/*
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* NVIDIA Tegra SoC device tree board support
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*
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* Copyright (C) 2011, 2013, NVIDIA Corporation
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* Copyright (C) 2010 Secret Lab Technologies, Ltd.
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* Copyright (C) 2010 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/clocksource.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <linux/pda_power.h>
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#include <linux/platform_data/tegra_usb.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/i2c-tegra.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include <linux/usb/tegra_usb_phy.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/setup.h>
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#include "board.h"
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#include "common.h"
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#include "fuse.h"
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#include "iomap.h"
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static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
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.operating_mode = TEGRA_USB_OTG,
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.power_down_on_bus_suspend = 1,
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.vbus_gpio = -1,
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};
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static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
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.reset_gpio = -1,
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.clk = "cdev2",
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};
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static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
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.phy_config = &tegra_ehci2_ulpi_phy_config,
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.operating_mode = TEGRA_USB_HOST,
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.power_down_on_bus_suspend = 1,
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.vbus_gpio = -1,
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};
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static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
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.operating_mode = TEGRA_USB_HOST,
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.power_down_on_bus_suspend = 1,
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.vbus_gpio = -1,
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};
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static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5000000, "tegra-ehci.0",
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&tegra_ehci1_pdata),
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OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5004000, "tegra-ehci.1",
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&tegra_ehci2_pdata),
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OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5008000, "tegra-ehci.2",
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&tegra_ehci3_pdata),
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{}
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};
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static void __init tegra_dt_init(void)
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{
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struct soc_device_attribute *soc_dev_attr;
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struct soc_device *soc_dev;
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struct device *parent = NULL;
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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goto out;
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soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
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soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->family);
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kfree(soc_dev_attr->revision);
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kfree(soc_dev_attr->soc_id);
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kfree(soc_dev_attr);
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goto out;
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}
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parent = soc_device_to_device(soc_dev);
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/*
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* Finished with the static registrations now; fill in the missing
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* devices
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*/
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out:
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of_platform_populate(NULL, of_default_bus_match_table,
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tegra20_auxdata_lookup, parent);
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}
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static void __init trimslice_init(void)
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{
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#ifdef CONFIG_TEGRA_PCI
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int ret;
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ret = tegra_pcie_init(true, true);
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if (ret)
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pr_err("tegra_pci_init() failed: %d\n", ret);
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#endif
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}
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static void __init harmony_init(void)
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{
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#ifdef CONFIG_TEGRA_PCI
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int ret;
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ret = harmony_pcie_init();
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if (ret)
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pr_err("harmony_pcie_init() failed: %d\n", ret);
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#endif
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}
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static void __init paz00_init(void)
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{
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if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
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tegra_paz00_wifikill_init();
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}
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static struct {
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char *machine;
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void (*init)(void);
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} board_init_funcs[] = {
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{ "compulab,trimslice", trimslice_init },
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{ "nvidia,harmony", harmony_init },
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{ "compal,paz00", paz00_init },
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};
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static void __init tegra_dt_init_late(void)
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{
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int i;
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tegra_init_late();
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for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
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if (of_machine_is_compatible(board_init_funcs[i].machine)) {
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board_init_funcs[i].init();
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break;
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}
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}
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}
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static const char * const tegra_dt_board_compat[] = {
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"nvidia,tegra114",
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"nvidia,tegra30",
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"nvidia,tegra20",
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NULL
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};
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DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
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.map_io = tegra_map_common_io,
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.smp = smp_ops(tegra_smp_ops),
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.init_early = tegra_init_early,
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.init_irq = tegra_dt_init_irq,
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.init_time = clocksource_of_init,
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.init_machine = tegra_dt_init,
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.init_late = tegra_dt_init_late,
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.restart = tegra_assert_system_reset,
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.dt_compat = tegra_dt_board_compat,
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MACHINE_END
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