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e63340ae6b
Remove includes of <linux/smp_lock.h> where it is not used/needed. Suggested by Al Viro. Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc, sparc64, and arm (all 59 defconfigs). Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
451 lines
11 KiB
C
451 lines
11 KiB
C
/* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
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*
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* Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*
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* Based on sun4m's smp.c, which is:
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include <asm/head.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/profile.h>
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#include <asm/ptrace.h>
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#include <asm/atomic.h>
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#include <asm/irq_regs.h>
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#include <asm/delay.h>
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#include <asm/irq.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/oplib.h>
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#include <asm/sbus.h>
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#include <asm/sbi.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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#include <asm/cpudata.h>
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#define IRQ_CROSS_CALL 15
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extern ctxd_t *srmmu_ctx_table_phys;
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extern void calibrate_delay(void);
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static volatile int smp_processors_ready = 0;
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static int smp_highest_cpu;
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extern volatile unsigned long cpu_callin_map[NR_CPUS];
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extern cpuinfo_sparc cpu_data[NR_CPUS];
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extern unsigned char boot_cpu_id;
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extern volatile int smp_process_available;
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extern cpumask_t smp_commenced_mask;
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extern int __smp4d_processor_id(void);
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/* #define SMP_DEBUG */
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#ifdef SMP_DEBUG
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#define SMP_PRINTK(x) printk x
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#else
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#define SMP_PRINTK(x)
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#endif
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static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
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{
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__asm__ __volatile__("swap [%1], %0\n\t" :
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"=&r" (val), "=&r" (ptr) :
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"0" (val), "1" (ptr));
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return val;
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}
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static void smp_setup_percpu_timer(void);
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extern void cpu_probe(void);
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extern void sun4d_distribute_irqs(void);
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void __init smp4d_callin(void)
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{
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int cpuid = hard_smp4d_processor_id();
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extern spinlock_t sun4d_imsk_lock;
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unsigned long flags;
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/* Show we are alive */
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cpu_leds[cpuid] = 0x6;
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show_leds(cpuid);
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/* Enable level15 interrupt, disable level14 interrupt for now */
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cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
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local_flush_cache_all();
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local_flush_tlb_all();
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/*
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* Unblock the master CPU _only_ when the scheduler state
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* of all secondary CPUs will be up-to-date, so after
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* the SMP initialization the master will be just allowed
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* to call the scheduler code.
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*/
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/* Get our local ticker going. */
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smp_setup_percpu_timer();
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calibrate_delay();
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smp_store_cpu_info(cpuid);
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local_flush_cache_all();
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local_flush_tlb_all();
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/* Allow master to continue. */
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swap((unsigned long *)&cpu_callin_map[cpuid], 1);
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local_flush_cache_all();
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local_flush_tlb_all();
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cpu_probe();
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while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
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barrier();
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while(current_set[cpuid]->cpu != cpuid)
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barrier();
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/* Fix idle thread fields. */
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__asm__ __volatile__("ld [%0], %%g6\n\t"
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: : "r" (¤t_set[cpuid])
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: "memory" /* paranoid */);
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cpu_leds[cpuid] = 0x9;
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show_leds(cpuid);
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/* Attach to the address space of init_task. */
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atomic_inc(&init_mm.mm_count);
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current->active_mm = &init_mm;
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local_flush_cache_all();
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local_flush_tlb_all();
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local_irq_enable(); /* We don't allow PIL 14 yet */
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while (!cpu_isset(cpuid, smp_commenced_mask))
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barrier();
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spin_lock_irqsave(&sun4d_imsk_lock, flags);
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cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
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spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
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cpu_set(cpuid, cpu_online_map);
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}
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extern void init_IRQ(void);
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extern void cpu_panic(void);
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/*
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* Cycle through the processors asking the PROM to start each one.
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*/
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extern struct linux_prom_registers smp_penguin_ctable;
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extern unsigned long trapbase_cpu1[];
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extern unsigned long trapbase_cpu2[];
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extern unsigned long trapbase_cpu3[];
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void __init smp4d_boot_cpus(void)
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{
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if (boot_cpu_id)
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current_set[0] = NULL;
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smp_setup_percpu_timer();
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local_flush_cache_all();
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}
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int __cpuinit smp4d_boot_one_cpu(int i)
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{
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extern unsigned long sun4d_cpu_startup;
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unsigned long *entry = &sun4d_cpu_startup;
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struct task_struct *p;
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int timeout;
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int cpu_node;
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cpu_find_by_instance(i, &cpu_node,NULL);
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/* Cook up an idler for this guy. */
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p = fork_idle(i);
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current_set[i] = task_thread_info(p);
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/*
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* Initialize the contexts table
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* Since the call to prom_startcpu() trashes the structure,
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* we need to re-initialize it for each cpu
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*/
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smp_penguin_ctable.which_io = 0;
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smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
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smp_penguin_ctable.reg_size = 0;
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/* whirrr, whirrr, whirrrrrrrrr... */
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SMP_PRINTK(("Starting CPU %d at %p \n", i, entry));
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local_flush_cache_all();
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prom_startcpu(cpu_node,
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&smp_penguin_ctable, 0, (char *)entry);
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SMP_PRINTK(("prom_startcpu returned :)\n"));
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/* wheee... it's going... */
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for(timeout = 0; timeout < 10000; timeout++) {
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if(cpu_callin_map[i])
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break;
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udelay(200);
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}
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if (!(cpu_callin_map[i])) {
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printk("Processor %d is stuck.\n", i);
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return -ENODEV;
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}
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local_flush_cache_all();
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return 0;
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}
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void __init smp4d_smp_done(void)
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{
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int i, first;
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int *prev;
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/* setup cpu list for irq rotation */
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first = 0;
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prev = &first;
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for (i = 0; i < NR_CPUS; i++)
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if (cpu_online(i)) {
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*prev = i;
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prev = &cpu_data(i).next;
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}
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*prev = first;
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local_flush_cache_all();
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/* Free unneeded trap tables */
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ClearPageReserved(virt_to_page(trapbase_cpu1));
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init_page_count(virt_to_page(trapbase_cpu1));
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free_page((unsigned long)trapbase_cpu1);
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totalram_pages++;
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num_physpages++;
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ClearPageReserved(virt_to_page(trapbase_cpu2));
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init_page_count(virt_to_page(trapbase_cpu2));
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free_page((unsigned long)trapbase_cpu2);
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totalram_pages++;
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num_physpages++;
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ClearPageReserved(virt_to_page(trapbase_cpu3));
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init_page_count(virt_to_page(trapbase_cpu3));
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free_page((unsigned long)trapbase_cpu3);
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totalram_pages++;
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num_physpages++;
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/* Ok, they are spinning and ready to go. */
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smp_processors_ready = 1;
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sun4d_distribute_irqs();
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}
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static struct smp_funcall {
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smpfunc_t func;
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unsigned long arg1;
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unsigned long arg2;
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unsigned long arg3;
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unsigned long arg4;
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unsigned long arg5;
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unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
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unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
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} ccall_info __attribute__((aligned(8)));
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static DEFINE_SPINLOCK(cross_call_lock);
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/* Cross calls must be serialized, at least currently. */
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void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
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unsigned long arg3, unsigned long arg4, unsigned long arg5)
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{
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if(smp_processors_ready) {
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register int high = smp_highest_cpu;
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unsigned long flags;
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spin_lock_irqsave(&cross_call_lock, flags);
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{
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/* If you make changes here, make sure gcc generates proper code... */
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register smpfunc_t f asm("i0") = func;
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register unsigned long a1 asm("i1") = arg1;
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register unsigned long a2 asm("i2") = arg2;
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register unsigned long a3 asm("i3") = arg3;
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register unsigned long a4 asm("i4") = arg4;
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register unsigned long a5 asm("i5") = arg5;
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__asm__ __volatile__(
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"std %0, [%6]\n\t"
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"std %2, [%6 + 8]\n\t"
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"std %4, [%6 + 16]\n\t" : :
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"r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
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"r" (&ccall_info.func));
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}
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/* Init receive/complete mapping, plus fire the IPI's off. */
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{
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cpumask_t mask;
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register int i;
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mask = cpumask_of_cpu(hard_smp4d_processor_id());
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cpus_andnot(mask, cpu_online_map, mask);
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for(i = 0; i <= high; i++) {
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if (cpu_isset(i, mask)) {
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ccall_info.processors_in[i] = 0;
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ccall_info.processors_out[i] = 0;
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sun4d_send_ipi(i, IRQ_CROSS_CALL);
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}
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}
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}
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{
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register int i;
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i = 0;
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do {
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while(!ccall_info.processors_in[i])
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barrier();
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} while(++i <= high);
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i = 0;
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do {
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while(!ccall_info.processors_out[i])
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barrier();
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} while(++i <= high);
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}
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spin_unlock_irqrestore(&cross_call_lock, flags);
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}
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}
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/* Running cross calls. */
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void smp4d_cross_call_irq(void)
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{
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int i = hard_smp4d_processor_id();
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ccall_info.processors_in[i] = 1;
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ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
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ccall_info.arg4, ccall_info.arg5);
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ccall_info.processors_out[i] = 1;
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}
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static int smp4d_stop_cpu_sender;
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static void smp4d_stop_cpu(void)
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{
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int me = hard_smp4d_processor_id();
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if (me != smp4d_stop_cpu_sender)
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while(1) barrier();
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}
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/* Cross calls, in order to work efficiently and atomically do all
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* the message passing work themselves, only stopcpu and reschedule
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* messages come through here.
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*/
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void smp4d_message_pass(int target, int msg, unsigned long data, int wait)
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{
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int me = hard_smp4d_processor_id();
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SMP_PRINTK(("smp4d_message_pass %d %d %08lx %d\n", target, msg, data, wait));
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if (msg == MSG_STOP_CPU && target == MSG_ALL_BUT_SELF) {
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unsigned long flags;
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static DEFINE_SPINLOCK(stop_cpu_lock);
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spin_lock_irqsave(&stop_cpu_lock, flags);
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smp4d_stop_cpu_sender = me;
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smp4d_cross_call((smpfunc_t)smp4d_stop_cpu, 0, 0, 0, 0, 0);
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spin_unlock_irqrestore(&stop_cpu_lock, flags);
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}
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printk("Yeeee, trying to send SMP msg(%d) to %d on cpu %d\n", msg, target, me);
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panic("Bogon SMP message pass.");
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}
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void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
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{
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struct pt_regs *old_regs;
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int cpu = hard_smp4d_processor_id();
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static int cpu_tick[NR_CPUS];
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static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
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old_regs = set_irq_regs(regs);
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bw_get_prof_limit(cpu);
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bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
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cpu_tick[cpu]++;
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if (!(cpu_tick[cpu] & 15)) {
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if (cpu_tick[cpu] == 0x60)
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cpu_tick[cpu] = 0;
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cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
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show_leds(cpu);
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}
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profile_tick(CPU_PROFILING);
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if(!--prof_counter(cpu)) {
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int user = user_mode(regs);
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irq_enter();
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update_process_times(user);
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irq_exit();
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prof_counter(cpu) = prof_multiplier(cpu);
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}
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set_irq_regs(old_regs);
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}
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extern unsigned int lvl14_resolution;
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static void __init smp_setup_percpu_timer(void)
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{
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int cpu = hard_smp4d_processor_id();
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prof_counter(cpu) = prof_multiplier(cpu) = 1;
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load_profile_irq(cpu, lvl14_resolution);
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}
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void __init smp4d_blackbox_id(unsigned *addr)
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{
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int rd = *addr & 0x3e000000;
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addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
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addr[1] = 0x01000000; /* nop */
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addr[2] = 0x01000000; /* nop */
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}
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void __init smp4d_blackbox_current(unsigned *addr)
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{
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int rd = *addr & 0x3e000000;
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addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
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addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
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addr[4] = 0x01000000; /* nop */
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}
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void __init sun4d_init_smp(void)
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{
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int i;
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extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
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/* Patch ipi15 trap table */
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t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
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/* And set btfixup... */
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BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
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BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
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BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
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BTFIXUPSET_CALL(smp_message_pass, smp4d_message_pass, BTFIXUPCALL_NORM);
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BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
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for (i = 0; i < NR_CPUS; i++) {
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ccall_info.processors_in[i] = 1;
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ccall_info.processors_out[i] = 1;
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}
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}
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